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author | Marek Vasut <marex@denx.de> | 2015-07-09 05:15:40 +0200 |
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committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:07 +0200 |
commit | 232fcc6e9d5d13abba57994e6ee22e38e1321669 (patch) | |
tree | a70484b3386d1dced8f96d209aec4e1769cf5511 /arch | |
parent | 4a0080d98517a3d9b423a319331e73975b43b706 (diff) | |
download | u-boot-imx-232fcc6e9d5d13abba57994e6ee22e38e1321669.zip u-boot-imx-232fcc6e9d5d13abba57994e6ee22e38e1321669.tar.gz u-boot-imx-232fcc6e9d5d13abba57994e6ee22e38e1321669.tar.bz2 |
arm: socfpga: spl: Configure SCU and NIC-301 early
Configure the ARM SCU and NIC301 very early. The ARM SCU SNSAC register
must be configured, so we can access all peripherals. The NIC-301 must
be configured so that the BootROM is not mapped into the SDRAM address
space.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-socfpga/spl.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c index 8345975..15fee0a 100644 --- a/arch/arm/mach-socfpga/spl.c +++ b/arch/arm/mach-socfpga/spl.c @@ -17,11 +17,27 @@ #include <asm/arch/clock_manager.h> #include <asm/arch/scan_manager.h> #include <asm/arch/sdram.h> +#include <asm/arch/scu.h> +#include <asm/arch/nic301.h> DECLARE_GLOBAL_DATA_PTR; static struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; +static struct scu_registers *scu_regs = + (struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS; +static struct nic301_registers *nic301_regs = + (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS; + +static void socfpga_nic301_slave_ns(void) +{ + writel(0x1, &nic301_regs->lwhps2fpgaregs); + writel(0x1, &nic301_regs->hps2fpgaregs); + writel(0x1, &nic301_regs->acp); + writel(0x1, &nic301_regs->rom); + writel(0x1, &nic301_regs->ocram); + writel(0x1, &nic301_regs->sdrdata); +} void board_init_f(ulong dummy) { @@ -42,7 +58,13 @@ void board_init_f(ulong dummy) memset(__bss_start, 0, __bss_end - __bss_start); + socfpga_nic301_slave_ns(); + + /* Configure ARM MPU SNSAC register. */ + setbits_le32(&scu_regs->sacr, 0xfff); + /* Remap SDRAM to 0x0 */ + writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ writel(0x1, &pl310->pl310_addr_filter_start); board_init_r(NULL, 0); |