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authorTom Rini <trini@konsulko.com>2015-03-01 21:07:53 -0500
committerTom Rini <trini@konsulko.com>2015-03-01 21:07:53 -0500
commit1da7ce4155d0839d9d56525379493bb0f80b5330 (patch)
treea29a93170e68b30d1a5b73a8210ddb92b5aaa3c7 /arch
parentfc834100950ab630f442aece500d8c9ccfa2b992 (diff)
parent105a9e705efaeeac63e795e2a184b0a18db0ac5a (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/cpu/armv7/Makefile1
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-ld4/sg_init.c28
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c29
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c75
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c28
-rw-r--r--arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c29
-rw-r--r--arch/arm/dts/uniphier-ph1-ld4.dtsi8
-rw-r--r--arch/arm/dts/uniphier-ph1-pro4-ref.dts5
-rw-r--r--arch/arm/dts/uniphier-ph1-pro4.dtsi22
-rw-r--r--arch/arm/dts/uniphier-ph1-sld3.dtsi10
-rw-r--r--arch/arm/dts/uniphier-ph1-sld8.dtsi8
-rw-r--r--arch/arm/include/asm/arch-uniphier/ehci-uniphier.h33
-rw-r--r--arch/arm/mach-uniphier/Kconfig (renamed from arch/arm/cpu/armv7/uniphier/Kconfig)0
-rw-r--r--arch/arm/mach-uniphier/Makefile (renamed from arch/arm/cpu/armv7/uniphier/Makefile)1
-rw-r--r--arch/arm/mach-uniphier/board_common.c (renamed from arch/arm/cpu/armv7/uniphier/board_common.c)2
-rw-r--r--arch/arm/mach-uniphier/board_early_init_f.c (renamed from arch/arm/cpu/armv7/uniphier/board_early_init_f.c)9
-rw-r--r--arch/arm/mach-uniphier/board_early_init_r.c (renamed from arch/arm/cpu/armv7/uniphier/board_early_init_r.c)2
-rw-r--r--arch/arm/mach-uniphier/board_late_init.c (renamed from arch/arm/cpu/armv7/uniphier/board_late_init.c)0
-rw-r--r--arch/arm/mach-uniphier/cache_uniphier.c (renamed from arch/arm/cpu/armv7/uniphier/cache_uniphier.c)2
-rw-r--r--arch/arm/mach-uniphier/cmd_ddrphy.c (renamed from arch/arm/cpu/armv7/uniphier/cmd_ddrphy.c)2
-rw-r--r--arch/arm/mach-uniphier/cmd_pinmon.c (renamed from arch/arm/cpu/armv7/uniphier/cmd_pinmon.c)4
-rw-r--r--arch/arm/mach-uniphier/cpu_info.c (renamed from arch/arm/cpu/armv7/uniphier/cpu_info.c)2
-rw-r--r--arch/arm/mach-uniphier/ddrphy_training.c (renamed from arch/arm/cpu/armv7/uniphier/ddrphy_training.c)2
-rw-r--r--arch/arm/mach-uniphier/dram_init.c (renamed from arch/arm/cpu/armv7/uniphier/dram_init.c)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/arm-mpcore.h (renamed from arch/arm/include/asm/arch-uniphier/arm-mpcore.h)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/bcu-regs.h (renamed from arch/arm/include/asm/arch-uniphier/bcu-regs.h)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/board.h (renamed from arch/arm/include/asm/arch-uniphier/board.h)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/boot-device.h (renamed from arch/arm/include/asm/arch-uniphier/boot-device.h)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/ddrphy-regs.h (renamed from arch/arm/include/asm/arch-uniphier/ddrphy-regs.h)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/debug-uart.S (renamed from arch/arm/include/asm/arch-uniphier/debug-uart.S)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/led.h (renamed from arch/arm/include/asm/arch-uniphier/led.h)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/mio-regs.h (renamed from arch/arm/include/asm/arch-uniphier/mio-regs.h)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/platdevice.h (renamed from arch/arm/include/asm/arch-uniphier/platdevice.h)2
-rw-r--r--arch/arm/mach-uniphier/include/mach/sbc-regs.h (renamed from arch/arm/include/asm/arch-uniphier/sbc-regs.h)0
-rw-r--r--arch/arm/mach-uniphier/include/mach/sc-regs.h (renamed from arch/arm/include/asm/arch-uniphier/sc-regs.h)29
-rw-r--r--arch/arm/mach-uniphier/include/mach/sg-regs.h (renamed from arch/arm/include/asm/arch-uniphier/sg-regs.h)119
-rw-r--r--arch/arm/mach-uniphier/include/mach/ssc-regs.h (renamed from arch/arm/include/asm/arch-uniphier/ssc-regs.h)2
-rw-r--r--arch/arm/mach-uniphier/include/mach/umc-regs.h (renamed from arch/arm/include/asm/arch-uniphier/umc-regs.h)0
-rw-r--r--arch/arm/mach-uniphier/init_page_table.S (renamed from arch/arm/cpu/armv7/uniphier/init_page_table.S)0
-rw-r--r--arch/arm/mach-uniphier/lowlevel_init.S (renamed from arch/arm/cpu/armv7/uniphier/lowlevel_init.S)16
-rw-r--r--arch/arm/mach-uniphier/memconf.c104
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/Makefile (renamed from arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile)6
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/bcu_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/bcu_init.c)2
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/boot-mode.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/boot-mode.c)0
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c42
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/ddrphy_init.c)2
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c1
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S)4
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/pinctrl.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/pinctrl.c)2
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/platdevice.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c)16
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/pll_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c)4
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_spectrum.c)0
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/sbc_init.c50
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c)15
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/sg_init.c19
-rw-r--r--arch/arm/mach-uniphier/ph1-ld4/umc_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c)4
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/Makefile (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile)6
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/boot-mode.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-pro4/boot-mode.c)6
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c57
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-pro4/ddrphy_init.c)2
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c)16
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S (renamed from arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S)8
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/pinctrl.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-pro4/pinctrl.c)9
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/platdevice.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c)13
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/pll_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c)21
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_spectrum.c)2
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/sbc_init.c43
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c43
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/sg_init.c19
-rw-r--r--arch/arm/mach-uniphier/ph1-pro4/umc_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c)4
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/Makefile (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile)6
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/bcu_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/bcu_init.c)0
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/boot-mode.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/boot-mode.c)0
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c1
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/ddrphy_init.c)2
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c1
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S)4
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/pinctrl.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/pinctrl.c)2
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/platdevice.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c)16
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/pll_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c)4
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/pll_spectrum.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_spectrum.c)0
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/sbc_init.c1
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c)32
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/sg_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/sg_init.c)0
-rw-r--r--arch/arm/mach-uniphier/ph1-sld8/umc_init.c (renamed from arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c)4
-rw-r--r--arch/arm/mach-uniphier/print_misc_info.c (renamed from arch/arm/cpu/armv7/uniphier/print_misc_info.c)2
-rw-r--r--arch/arm/mach-uniphier/reset.c (renamed from arch/arm/cpu/armv7/uniphier/reset.c)2
-rw-r--r--arch/arm/mach-uniphier/smp.S (renamed from arch/arm/cpu/armv7/uniphier/smp.S)4
-rw-r--r--arch/arm/mach-uniphier/spl.c (renamed from arch/arm/cpu/armv7/uniphier/spl.c)17
-rw-r--r--arch/arm/mach-uniphier/support_card.c (renamed from arch/arm/cpu/armv7/uniphier/support_card.c)4
-rw-r--r--arch/arm/mach-uniphier/timer.c (renamed from arch/arm/cpu/armv7/uniphier/timer.c)2
93 files changed, 565 insertions, 532 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7a2f91c..2265afb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -723,7 +723,7 @@ source "arch/arm/cpu/armv7/s5pc1xx/Kconfig"
source "arch/arm/mach-tegra/Kconfig"
-source "arch/arm/cpu/armv7/uniphier/Kconfig"
+source "arch/arm/mach-uniphier/Kconfig"
source "arch/arm/mach-versatile/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 878ae26..08946de 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -15,6 +15,7 @@ machine-$(CONFIG_ARCH_NOMADIK) += nomadik
# TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
machine-$(CONFIG_ORION5X) += orion5x
machine-$(CONFIG_TEGRA) += tegra
+machine-$(CONFIG_ARCH_UNIPHIER) += uniphier
machine-$(CONFIG_ARCH_VERSATILE) += versatile
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index b228ed6..ad22489 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -56,6 +56,5 @@ obj-$(CONFIG_SOCFPGA) += socfpga/
obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
obj-$(CONFIG_U8500) += u8500/
-obj-$(CONFIG_ARCH_UNIPHIER) += uniphier/
obj-$(CONFIG_VF610) += vf610/
obj-$(CONFIG_ZYNQ) += zynq/
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/sg_init.c b/arch/arm/cpu/armv7/uniphier/ph1-ld4/sg_init.c
deleted file mode 100644
index 2cc5df6..0000000
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/sg_init.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/sg-regs.h>
-
-void sg_init(void)
-{
- u32 tmp;
-
- /* Set DDR size */
- tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0);
- tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1);
-#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE
- tmp |= SG_MEMCONF_SPARSEMEM;
-#endif
- writel(tmp, SG_MEMCONF);
-
- /* Input ports must be enabled before deasserting reset of cores */
- tmp = readl(SG_IECTRL);
- tmp |= 0x1;
- writel(tmp, SG_IECTRL);
-}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c
deleted file mode 100644
index 18965a9..0000000
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/sc-regs.h>
-
-void clkrst_init(void)
-{
- u32 tmp;
-
- /* deassert reset */
- tmp = readl(SC_RSTCTRL);
- tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1
- | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND;
- writel(tmp, SC_RSTCTRL);
- readl(SC_RSTCTRL); /* dummy read */
-
- /* privide clocks */
- tmp = readl(SC_CLKCTRL);
- tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC
- | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI;
- writel(tmp, SC_CLKCTRL);
- readl(SC_CLKCTRL); /* dummy read */
-}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c
deleted file mode 100644
index 3c82a1a..0000000
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/sbc-regs.h>
-#include <asm/arch/sg-regs.h>
-
-void sbc_init(void)
-{
-#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
- /*
- * Only CS1 is connected to support card.
- * BKSZ[1:0] should be set to "01".
- */
- writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
- writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
- writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
- writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
-
- if (boot_is_swapped()) {
- /*
- * Boot Swap On: boot from external NOR/SRAM
- * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff.
- *
- * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank
- * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals
- */
- writel(0x0000bc01, SBBASE0);
- } else {
- /*
- * Boot Swap Off: boot from mask ROM
- * 0x00000000-0x01ffffff: mask ROM
- * 0x02000000-0x3effffff: memory bank (31MB)
- * 0x03f00000-0x3fffffff: peripherals (1MB)
- */
- writel(0x0000be01, SBBASE0); /* dummy */
- writel(0x0200be01, SBBASE1);
- }
-#elif defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
-#if !defined(CONFIG_SPL_BUILD)
- /* XECS0: boot/sub memory (boot swap = off/on) */
- writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00);
- writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01);
- writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02);
- writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04);
-#endif
- /* XECS1: sub/boot memory (boot swap = off/on) */
- writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
- writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);
- writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
- writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
-
- /* XECS3: peripherals */
- writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30);
- writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31);
- writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32);
- writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34);
-
- writel(0x0000bc01, SBBASE0); /* boot memory */
- writel(0x0400bc01, SBBASE1); /* sub memory */
- writel(0x0800bf01, SBBASE3); /* peripherals */
-
-#if !defined(CONFIG_SPL_BUILD)
- sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */
-#endif
- sg_set_pinsel(313, 5); /* PORT15 -> XECS3 */
- writel(0x00000001, SG_LOADPINCTRL);
-
-#endif /* CONFIG_XXX_MICRO_SUPPORT_CARD */
-}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
deleted file mode 100644
index b7c4b10..0000000
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/sg-regs.h>
-
-void sg_init(void)
-{
- u32 tmp;
-
- /* Set DDR size */
- tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0);
- tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1);
-#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE
- tmp |= SG_MEMCONF_SPARSEMEM;
-#endif
- writel(tmp, SG_MEMCONF);
-
- /* Input ports must be enabled before deasserting reset of cores */
- tmp = readl(SG_IECTRL);
- tmp |= 1 << 6;
- writel(tmp, SG_IECTRL);
-}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c b/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c
deleted file mode 100644
index 18965a9..0000000
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 2011-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/sc-regs.h>
-
-void clkrst_init(void)
-{
- u32 tmp;
-
- /* deassert reset */
- tmp = readl(SC_RSTCTRL);
- tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1
- | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND;
- writel(tmp, SC_RSTCTRL);
- readl(SC_RSTCTRL); /* dummy read */
-
- /* privide clocks */
- tmp = readl(SC_CLKCTRL);
- tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC
- | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI;
- writel(tmp, SC_CLKCTRL);
- readl(SC_CLKCTRL); /* dummy read */
-}
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 2a3dd73..8ed7bbf 100644
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -1,7 +1,7 @@
/*
* Device Tree Source for UniPhier PH1-LD4 SoC
*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
@@ -94,19 +94,19 @@
};
usb0: usb@5a800100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
usb1: usb@5a810100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
usb2: usb@5a820100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
};
diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts
index d9e7a8c..5bec92b 100644
--- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts
@@ -36,6 +36,7 @@
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ usb0 = &usb0;
};
};
@@ -54,7 +55,3 @@
&usb0 {
status = "okay";
};
-
-&usb1 {
- status = "okay";
-};
diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index 49e375e..1247779 100644
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -1,7 +1,7 @@
/*
* Device Tree Source for UniPhier PH1-Pro4 SoC
*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
@@ -119,18 +119,30 @@
status = "ok";
};
- usb0: usb@5a800100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ usb2: usb@5a800100 {
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
- usb1: usb@5a810100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ usb3: usb@5a810100 {
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
+ usb0: usb@65a00000 {
+ compatible = "panasonic,uniphier-xhci", "generic-xhci";
+ status = "disabled";
+ reg = <0x65a00000 0x100>;
+ };
+
+ usb1: usb@65c00000 {
+ compatible = "panasonic,uniphier-xhci", "generic-xhci";
+ status = "disabled";
+ reg = <0x65c00000 0x100>;
+ };
+
nand: nand@68000000 {
compatible = "denali,denali-nand-dt";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index f5529d2..88322c6 100644
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -1,7 +1,7 @@
/*
* Device Tree Source for UniPhier PH1-sLD3 SoC
*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
@@ -93,25 +93,25 @@
};
usb0: usb@5a800100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
usb1: usb@5a810100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
usb2: usb@5a820100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
};
usb3: usb@5a830100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a830100 0x100>;
};
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index 0ea76e5..1b3eb22 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -1,7 +1,7 @@
/*
* Device Tree Source for UniPhier PH1-sLD8 SoC
*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
@@ -94,19 +94,19 @@
};
usb0: usb@5a800100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
usb1: usb@5a810100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
usb2: usb@5a820100 {
- compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
};
diff --git a/arch/arm/include/asm/arch-uniphier/ehci-uniphier.h b/arch/arm/include/asm/arch-uniphier/ehci-uniphier.h
deleted file mode 100644
index e9c5fb4..0000000
--- a/arch/arm/include/asm/arch-uniphier/ehci-uniphier.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (C) 2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __PLAT_UNIPHIER_EHCI_H
-#define __PLAT_UNIPHIER_EHCI_H
-
-#include <linux/types.h>
-#include <asm/io.h>
-#include "mio-regs.h"
-
-struct uniphier_ehci_platform_data {
- unsigned long base;
-};
-
-extern struct uniphier_ehci_platform_data uniphier_ehci_platdata[];
-
-static inline void uniphier_ehci_reset(int index, int on)
-{
- u32 tmp;
-
- tmp = readl(MIO_USB_RSTCTRL(index));
- if (on)
- tmp &= ~MIO_USB_RSTCTRL_XRST;
- else
- tmp |= MIO_USB_RSTCTRL_XRST;
- writel(tmp, MIO_USB_RSTCTRL(index));
-}
-
-#endif /* __PLAT_UNIPHIER_EHCI_H */
diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 8335685..8335685 100644
--- a/arch/arm/cpu/armv7/uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
diff --git a/arch/arm/cpu/armv7/uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index df418dd..e7a801b 100644
--- a/arch/arm/cpu/armv7/uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -7,6 +7,7 @@ ifdef CONFIG_SPL_BUILD
obj-y += lowlevel_init.o
obj-y += init_page_table.o
obj-y += spl.o
+obj-y += memconf.o
obj-y += ddrphy_training.o
else
diff --git a/arch/arm/cpu/armv7/uniphier/board_common.c b/arch/arm/mach-uniphier/board_common.c
index 3fb26c6..5f2d5f6 100644
--- a/arch/arm/cpu/armv7/uniphier/board_common.c
+++ b/arch/arm/mach-uniphier/board_common.c
@@ -6,7 +6,7 @@
*/
#include <common.h>
-#include <asm/arch/led.h>
+#include <mach/led.h>
/*
* Routine: board_init
diff --git a/arch/arm/cpu/armv7/uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c
index d25bbae..7108740 100644
--- a/arch/arm/cpu/armv7/uniphier/board_early_init_f.c
+++ b/arch/arm/mach-uniphier/board_early_init_f.c
@@ -5,10 +5,11 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/arch/led.h>
-#include <asm/arch/board.h>
+#include <mach/led.h>
+#include <mach/board.h>
void pin_init(void);
+void clkrst_init(void);
int board_early_init_f(void)
{
@@ -18,5 +19,9 @@ int board_early_init_f(void)
led_write(U, 1, , );
+ clkrst_init();
+
+ led_write(U, 2, , );
+
return 0;
}
diff --git a/arch/arm/cpu/armv7/uniphier/board_early_init_r.c b/arch/arm/mach-uniphier/board_early_init_r.c
index cb7e04f..579fe70 100644
--- a/arch/arm/cpu/armv7/uniphier/board_early_init_r.c
+++ b/arch/arm/mach-uniphier/board_early_init_r.c
@@ -6,7 +6,7 @@
*/
#include <common.h>
-#include <asm/arch/board.h>
+#include <mach/board.h>
int board_early_init_r(void)
{
diff --git a/arch/arm/cpu/armv7/uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index 0622a1e..0622a1e 100644
--- a/arch/arm/cpu/armv7/uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
diff --git a/arch/arm/cpu/armv7/uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c
index e47f977..52f3c7c 100644
--- a/arch/arm/cpu/armv7/uniphier/cache_uniphier.c
+++ b/arch/arm/mach-uniphier/cache_uniphier.c
@@ -8,7 +8,7 @@
#include <common.h>
#include <asm/io.h>
#include <asm/armv7.h>
-#include <asm/arch/ssc-regs.h>
+#include <mach/ssc-regs.h>
#ifdef CONFIG_UNIPHIER_L2CACHE_ON
static void uniphier_cache_maint_all(u32 operation)
diff --git a/arch/arm/cpu/armv7/uniphier/cmd_ddrphy.c b/arch/arm/mach-uniphier/cmd_ddrphy.c
index 431d901..5f44927 100644
--- a/arch/arm/cpu/armv7/uniphier/cmd_ddrphy.c
+++ b/arch/arm/mach-uniphier/cmd_ddrphy.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/ddrphy-regs.h>
+#include <mach/ddrphy-regs.h>
/* Select either decimal or hexadecimal */
#if 1
diff --git a/arch/arm/cpu/armv7/uniphier/cmd_pinmon.c b/arch/arm/mach-uniphier/cmd_pinmon.c
index 3c1b325..8be2ed4 100644
--- a/arch/arm/cpu/armv7/uniphier/cmd_pinmon.c
+++ b/arch/arm/mach-uniphier/cmd_pinmon.c
@@ -6,8 +6,8 @@
*/
#include <common.h>
-#include <asm/arch/boot-device.h>
-#include <asm/arch/sbc-regs.h>
+#include <mach/boot-device.h>
+#include <mach/sbc-regs.h>
static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
diff --git a/arch/arm/cpu/armv7/uniphier/cpu_info.c b/arch/arm/mach-uniphier/cpu_info.c
index 86d079a..13a0b1e 100644
--- a/arch/arm/cpu/armv7/uniphier/cpu_info.c
+++ b/arch/arm/mach-uniphier/cpu_info.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sg-regs.h>
int print_cpuinfo(void)
{
diff --git a/arch/arm/cpu/armv7/uniphier/ddrphy_training.c b/arch/arm/mach-uniphier/ddrphy_training.c
index cc8b8ad..b1d46cf 100644
--- a/arch/arm/cpu/armv7/uniphier/ddrphy_training.c
+++ b/arch/arm/mach-uniphier/ddrphy_training.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/ddrphy-regs.h>
+#include <mach/ddrphy-regs.h>
void ddrphy_prepare_training(struct ddrphy __iomem *phy, int rank)
{
diff --git a/arch/arm/cpu/armv7/uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index 4b8c938..4b8c938 100644
--- a/arch/arm/cpu/armv7/uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
diff --git a/arch/arm/include/asm/arch-uniphier/arm-mpcore.h b/arch/arm/mach-uniphier/include/mach/arm-mpcore.h
index cf7cd46..cf7cd46 100644
--- a/arch/arm/include/asm/arch-uniphier/arm-mpcore.h
+++ b/arch/arm/mach-uniphier/include/mach/arm-mpcore.h
diff --git a/arch/arm/include/asm/arch-uniphier/bcu-regs.h b/arch/arm/mach-uniphier/include/mach/bcu-regs.h
index 0dfd94e..0dfd94e 100644
--- a/arch/arm/include/asm/arch-uniphier/bcu-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/bcu-regs.h
diff --git a/arch/arm/include/asm/arch-uniphier/board.h b/arch/arm/mach-uniphier/include/mach/board.h
index e3cba5b..e3cba5b 100644
--- a/arch/arm/include/asm/arch-uniphier/board.h
+++ b/arch/arm/mach-uniphier/include/mach/board.h
diff --git a/arch/arm/include/asm/arch-uniphier/boot-device.h b/arch/arm/mach-uniphier/include/mach/boot-device.h
index 7a10f1c..7a10f1c 100644
--- a/arch/arm/include/asm/arch-uniphier/boot-device.h
+++ b/arch/arm/mach-uniphier/include/mach/boot-device.h
diff --git a/arch/arm/include/asm/arch-uniphier/ddrphy-regs.h b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
index 6b7d600..6b7d600 100644
--- a/arch/arm/include/asm/arch-uniphier/ddrphy-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
diff --git a/arch/arm/include/asm/arch-uniphier/debug-uart.S b/arch/arm/mach-uniphier/include/mach/debug-uart.S
index af55fee..af55fee 100644
--- a/arch/arm/include/asm/arch-uniphier/debug-uart.S
+++ b/arch/arm/mach-uniphier/include/mach/debug-uart.S
diff --git a/arch/arm/include/asm/arch-uniphier/led.h b/arch/arm/mach-uniphier/include/mach/led.h
index 21277da..21277da 100644
--- a/arch/arm/include/asm/arch-uniphier/led.h
+++ b/arch/arm/mach-uniphier/include/mach/led.h
diff --git a/arch/arm/include/asm/arch-uniphier/mio-regs.h b/arch/arm/mach-uniphier/include/mach/mio-regs.h
index 3306934..3306934 100644
--- a/arch/arm/include/asm/arch-uniphier/mio-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/mio-regs.h
diff --git a/arch/arm/include/asm/arch-uniphier/platdevice.h b/arch/arm/mach-uniphier/include/mach/platdevice.h
index 62a5126..cdf7d13 100644
--- a/arch/arm/include/asm/arch-uniphier/platdevice.h
+++ b/arch/arm/mach-uniphier/include/mach/platdevice.h
@@ -21,6 +21,4 @@ U_BOOT_DEVICE(serial##n) = { \
.platdata = &serial_device##n \
};
-#include <asm/arch/ehci-uniphier.h>
-
#endif /* ARCH_PLATDEVICE_H */
diff --git a/arch/arm/include/asm/arch-uniphier/sbc-regs.h b/arch/arm/mach-uniphier/include/mach/sbc-regs.h
index efb68e8..efb68e8 100644
--- a/arch/arm/include/asm/arch-uniphier/sbc-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sbc-regs.h
diff --git a/arch/arm/include/asm/arch-uniphier/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h
index 1197bb5..20878e2 100644
--- a/arch/arm/include/asm/arch-uniphier/sc-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h
@@ -1,7 +1,7 @@
/*
* UniPhier SC (System Control) block registers
*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Panasonic Corporation
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -11,10 +11,6 @@
#define SC_BASE_ADDR 0x61840000
-#define SC_MPLLOSCCTL (SC_BASE_ADDR | 0x1184)
-#define SC_MPLLOSCCTL_MPLLEN (0x1 << 0)
-#define SC_MPLLOSCCTL_MPLLST (0x1 << 1)
-
#define SC_DPLLCTRL (SC_BASE_ADDR | 0x1200)
#define SC_DPLLCTRL_SSC_EN (0x1 << 31)
#define SC_DPLLCTRL_FOUTMODE_MASK (0xf << 16)
@@ -38,21 +34,32 @@
#define SC_VPLL27BCTRL3 (SC_BASE_ADDR | 0x1298)
#define SC_RSTCTRL (SC_BASE_ADDR | 0x2000)
+#define SC_RSTCTRL_NRST_USB3B0 (0x1 << 17) /* USB3 #0 bus */
+#define SC_RSTCTRL_NRST_USB3C0 (0x1 << 16) /* USB3 #0 core */
#define SC_RSTCTRL_NRST_ETHER (0x1 << 12)
+#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10)
+#define SC_RSTCTRL_NRST_GIO (0x1 << 6)
#define SC_RSTCTRL_NRST_UMC1 (0x1 << 5)
#define SC_RSTCTRL_NRST_UMC0 (0x1 << 4)
#define SC_RSTCTRL_NRST_NAND (0x1 << 2)
#define SC_RSTCTRL2 (SC_BASE_ADDR | 0x2004)
+#define SC_RSTCTRL2_NRST_USB3B1 (0x1 << 17) /* USB3 #1 bus */
+#define SC_RSTCTRL2_NRST_USB3C1 (0x1 << 16) /* USB3 #1 core */
+
#define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008)
#define SC_CLKCTRL (SC_BASE_ADDR | 0x2104)
-#define SC_CLKCTRL_CLK_ETHER (0x1 << 12)
-#define SC_CLKCTRL_CLK_MIO (0x1 << 11)
-#define SC_CLKCTRL_CLK_UMC (0x1 << 4)
-#define SC_CLKCTRL_CLK_NAND (0x1 << 2)
-#define SC_CLKCTRL_CLK_SBC (0x1 << 1)
-#define SC_CLKCTRL_CLK_PERI (0x1 << 0)
+#define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */
+#define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */
+#define SC_CLKCTRL_CEN_ETHER (0x1 << 12)
+#define SC_CLKCTRL_CEN_MIO (0x1 << 11)
+#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10)
+#define SC_CLKCTRL_CEN_GIO (0x1 << 6)
+#define SC_CLKCTRL_CEN_UMC (0x1 << 4)
+#define SC_CLKCTRL_CEN_NAND (0x1 << 2)
+#define SC_CLKCTRL_CEN_SBC (0x1 << 1)
+#define SC_CLKCTRL_CEN_PERI (0x1 << 0)
/* System reset control register */
#define SC_IRQTIMSET (SC_BASE_ADDR | 0x3000)
diff --git a/arch/arm/include/asm/arch-uniphier/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h
index 4ae67c8..63408d5 100644
--- a/arch/arm/include/asm/arch-uniphier/sg-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h
@@ -1,7 +1,7 @@
/*
* UniPhier SG (SoC Glue) block registers
*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Panasonic Corporation
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -108,7 +108,6 @@
#else
#include <linux/types.h>
-#include <linux/sizes.h>
#include <asm/io.h>
static inline void sg_set_pinsel(int n, int value)
@@ -117,122 +116,6 @@ static inline void sg_set_pinsel(int n, int value)
| SG_PINSEL_MODE(n, value), SG_PINSEL_ADDR(n));
}
-static inline u32 sg_memconf_val_ch0(unsigned long size, int num)
-{
- int size_mb = size / num;
- u32 ret;
-
- switch (size_mb) {
- case SZ_64M:
- ret = SG_MEMCONF_CH0_SZ_64M;
- break;
- case SZ_128M:
- ret = SG_MEMCONF_CH0_SZ_128M;
- break;
- case SZ_256M:
- ret = SG_MEMCONF_CH0_SZ_256M;
- break;
- case SZ_512M:
- ret = SG_MEMCONF_CH0_SZ_512M;
- break;
- case SZ_1G:
- ret = SG_MEMCONF_CH0_SZ_1G;
- break;
- default:
- BUG();
- break;
- }
-
- switch (num) {
- case 1:
- ret |= SG_MEMCONF_CH0_NUM_1;
- break;
- case 2:
- ret |= SG_MEMCONF_CH0_NUM_2;
- break;
- default:
- BUG();
- break;
- }
- return ret;
-}
-
-static inline u32 sg_memconf_val_ch1(unsigned long size, int num)
-{
- int size_mb = size / num;
- u32 ret;
-
- switch (size_mb) {
- case SZ_64M:
- ret = SG_MEMCONF_CH1_SZ_64M;
- break;
- case SZ_128M:
- ret = SG_MEMCONF_CH1_SZ_128M;
- break;
- case SZ_256M:
- ret = SG_MEMCONF_CH1_SZ_256M;
- break;
- case SZ_512M:
- ret = SG_MEMCONF_CH1_SZ_512M;
- break;
- case SZ_1G:
- ret = SG_MEMCONF_CH1_SZ_1G;
- break;
- default:
- BUG();
- break;
- }
-
- switch (num) {
- case 1:
- ret |= SG_MEMCONF_CH1_NUM_1;
- break;
- case 2:
- ret |= SG_MEMCONF_CH1_NUM_2;
- break;
- default:
- BUG();
- break;
- }
- return ret;
-}
-
-static inline u32 sg_memconf_val_ch2(unsigned long size, int num)
-{
- int size_mb = size / num;
- u32 ret;
-
- switch (size_mb) {
- case SZ_64M:
- ret = SG_MEMCONF_CH2_SZ_64M;
- break;
- case SZ_128M:
- ret = SG_MEMCONF_CH2_SZ_128M;
- break;
- case SZ_256M:
- ret = SG_MEMCONF_CH2_SZ_256M;
- break;
- case SZ_512M:
- ret = SG_MEMCONF_CH2_SZ_512M;
- break;
- default:
- BUG();
- break;
- }
-
- switch (num) {
- case 1:
- ret |= SG_MEMCONF_CH2_NUM_1;
- break;
- case 2:
- ret |= SG_MEMCONF_CH2_NUM_2;
- break;
- default:
- BUG();
- break;
- }
- return ret;
-}
#endif /* __ASSEMBLY__ */
#endif /* ARCH_SG_REGS_H */
diff --git a/arch/arm/include/asm/arch-uniphier/ssc-regs.h b/arch/arm/mach-uniphier/include/mach/ssc-regs.h
index 77b3470..02fca3b 100644
--- a/arch/arm/include/asm/arch-uniphier/ssc-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/ssc-regs.h
@@ -60,8 +60,6 @@
#define SSCOQCE0 0x506c0270
#define SSC_LINE_SIZE 128
-#define SSC_NUM_ENTRIES 256
-#define SSC_WAY_SIZE ((SSC_LINE_SIZE) * (SSC_NUM_ENTRIES))
#define SSC_RANGE_OP_MAX_SIZE (0x00400000 - (SSC_LINE_SIZE))
#endif /* ARCH_SSC_REGS_H */
diff --git a/arch/arm/include/asm/arch-uniphier/umc-regs.h b/arch/arm/mach-uniphier/include/mach/umc-regs.h
index 6159281..6159281 100644
--- a/arch/arm/include/asm/arch-uniphier/umc-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/umc-regs.h
diff --git a/arch/arm/cpu/armv7/uniphier/init_page_table.S b/arch/arm/mach-uniphier/init_page_table.S
index 2638bcd..2638bcd 100644
--- a/arch/arm/cpu/armv7/uniphier/init_page_table.S
+++ b/arch/arm/mach-uniphier/init_page_table.S
diff --git a/arch/arm/cpu/armv7/uniphier/lowlevel_init.S b/arch/arm/mach-uniphier/lowlevel_init.S
index c208ab6..92299fe 100644
--- a/arch/arm/cpu/armv7/uniphier/lowlevel_init.S
+++ b/arch/arm/mach-uniphier/lowlevel_init.S
@@ -7,10 +7,12 @@
#include <config.h>
#include <linux/linkage.h>
+#include <linux/sizes.h>
#include <asm/system.h>
-#include <asm/arch/led.h>
-#include <asm/arch/arm-mpcore.h>
-#include <asm/arch/sbc-regs.h>
+#include <mach/led.h>
+#include <mach/arm-mpcore.h>
+#include <mach/sbc-regs.h>
+#include <mach/ssc-regs.h>
ENTRY(lowlevel_init)
mov r8, lr @ persevere link reg across call
@@ -122,9 +124,11 @@ ENTRY(enable_mmu)
mov pc, lr
ENDPROC(enable_mmu)
-#include <asm/arch/ssc-regs.h>
-
-#define BOOT_RAM_SIZE (SSC_WAY_SIZE)
+/*
+ * For PH1-Pro4 or older SoCs, the size of WAY is 32KB.
+ * It is large enough for tmp RAM.
+ */
+#define BOOT_RAM_SIZE (SZ_32K)
#define BOOT_WAY_BITS (0x00000100) /* way 8 */
ENTRY(setup_init_ram)
diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c
new file mode 100644
index 0000000..bf3c177
--- /dev/null
+++ b/arch/arm/mach-uniphier/memconf.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/sizes.h>
+#include <asm/io.h>
+#include <mach/sg-regs.h>
+
+static inline u32 sg_memconf_val_ch0(unsigned long size, int num)
+{
+ int size_mb = size / num;
+ u32 ret;
+
+ switch (size_mb) {
+ case SZ_64M:
+ ret = SG_MEMCONF_CH0_SZ_64M;
+ break;
+ case SZ_128M:
+ ret = SG_MEMCONF_CH0_SZ_128M;
+ break;
+ case SZ_256M:
+ ret = SG_MEMCONF_CH0_SZ_256M;
+ break;
+ case SZ_512M:
+ ret = SG_MEMCONF_CH0_SZ_512M;
+ break;
+ case SZ_1G:
+ ret = SG_MEMCONF_CH0_SZ_1G;
+ break;
+ default:
+ BUG();
+ break;
+ }
+
+ switch (num) {
+ case 1:
+ ret |= SG_MEMCONF_CH0_NUM_1;
+ break;
+ case 2:
+ ret |= SG_MEMCONF_CH0_NUM_2;
+ break;
+ default:
+ BUG();
+ break;
+ }
+ return ret;
+}
+
+static inline u32 sg_memconf_val_ch1(unsigned long size, int num)
+{
+ int size_mb = size / num;
+ u32 ret;
+
+ switch (size_mb) {
+ case SZ_64M:
+ ret = SG_MEMCONF_CH1_SZ_64M;
+ break;
+ case SZ_128M:
+ ret = SG_MEMCONF_CH1_SZ_128M;
+ break;
+ case SZ_256M:
+ ret = SG_MEMCONF_CH1_SZ_256M;
+ break;
+ case SZ_512M:
+ ret = SG_MEMCONF_CH1_SZ_512M;
+ break;
+ case SZ_1G:
+ ret = SG_MEMCONF_CH1_SZ_1G;
+ break;
+ default:
+ BUG();
+ break;
+ }
+
+ switch (num) {
+ case 1:
+ ret |= SG_MEMCONF_CH1_NUM_1;
+ break;
+ case 2:
+ ret |= SG_MEMCONF_CH1_NUM_2;
+ break;
+ default:
+ BUG();
+ break;
+ }
+ return ret;
+}
+
+void memconf_init(void)
+{
+ u32 tmp;
+
+ /* Set DDR size */
+ tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0);
+ tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1);
+#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE
+ tmp |= SG_MEMCONF_SPARSEMEM;
+#endif
+ writel(tmp, SG_MEMCONF);
+}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile
index e330fda..5ce3d8a 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
+++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile
@@ -4,10 +4,12 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
-obj-y += sbc_init.o sg_init.o pll_init.o clkrst_init.o \
+obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \
pll_spectrum.o umc_init.o ddrphy_init.o
+obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o
+obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o
else
-obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o
+obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o
endif
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/bcu_init.c b/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c
index 85f37f2..837e0d1 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/bcu_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/bcu-regs.h>
+#include <mach/bcu-regs.h>
#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/boot-mode.c b/arch/arm/mach-uniphier/ph1-ld4/boot-mode.c
index d359b56..d359b56 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/boot-mode.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/boot-mode.c
diff --git a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c
new file mode 100644
index 0000000..4ac5411
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <mach/sc-regs.h>
+
+void clkrst_init(void)
+{
+ u32 tmp;
+
+ /* deassert reset */
+ tmp = readl(SC_RSTCTRL);
+#ifdef CONFIG_UNIPHIER_ETH
+ tmp |= SC_RSTCTRL_NRST_ETHER;
+#endif
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+ tmp |= SC_RSTCTRL_NRST_STDMAC;
+#endif
+#ifdef CONFIG_NAND_DENALI
+ tmp |= SC_RSTCTRL_NRST_NAND;
+#endif
+ writel(tmp, SC_RSTCTRL);
+ readl(SC_RSTCTRL); /* dummy read */
+
+ /* privide clocks */
+ tmp = readl(SC_CLKCTRL);
+#ifdef CONFIG_UNIPHIER_ETH
+ tmp |= SC_CLKCTRL_CEN_ETHER;
+#endif
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+ tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
+#endif
+#ifdef CONFIG_NAND_DENALI
+ tmp |= SC_CLKCTRL_CEN_NAND;
+#endif
+ writel(tmp, SC_CLKCTRL);
+ readl(SC_CLKCTRL); /* dummy read */
+}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c
index 60fc5ad..a47e87a 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/ddrphy_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c
@@ -6,7 +6,7 @@
#include <linux/types.h>
#include <asm/io.h>
-#include <asm/arch/ddrphy-regs.h>
+#include <mach/ddrphy-regs.h>
void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size)
{
diff --git a/arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c
new file mode 100644
index 0000000..d7ef16b
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c
@@ -0,0 +1 @@
+#include "../ph1-pro4/early_clkrst_init.c"
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S
index c0778a0..7928c5c 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S
+++ b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S
@@ -8,10 +8,10 @@
*/
#include <linux/linkage.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sg-regs.h>
#define UART_CLK 36864000
-#include <asm/arch/debug-uart.S>
+#include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug)
init_debug_uart r0, r1, r2
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c
index a742940..15d81eb 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pinctrl.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sg-regs.h>
void pin_init(void)
{
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c b/arch/arm/mach-uniphier/ph1-ld4/platdevice.c
index 9d51299..c0e6294 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/platdevice.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/arch/platdevice.h>
+#include <mach/platdevice.h>
#define UART_MASTER_CLK 36864000
@@ -13,15 +13,3 @@ SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)
-
-struct uniphier_ehci_platform_data uniphier_ehci_platdata[] = {
- {
- .base = 0x5a800100,
- },
- {
- .base = 0x5a810100,
- },
- {
- .base = 0x5a820100,
- },
-};
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c b/arch/arm/mach-uniphier/ph1-ld4/pll_init.c
index b83582f..985e14f 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/pll_init.c
@@ -6,8 +6,8 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sc-regs.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sc-regs.h>
+#include <mach/sg-regs.h>
#undef DPLL_SSC_RATE_1PER
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c
index 837b2a8..837b2a8 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_spectrum.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c
diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c
new file mode 100644
index 0000000..00f8461
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <mach/sbc-regs.h>
+#include <mach/sg-regs.h>
+
+void sbc_init(void)
+{
+ u32 tmp;
+
+ /* system bus output enable */
+ tmp = readl(PC0CTRL);
+ tmp &= 0xfffffcff;
+ writel(tmp, PC0CTRL);
+
+ /*
+ * Only CS1 is connected to support card.
+ * BKSZ[1:0] should be set to "01".
+ */
+ writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
+ writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
+ writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
+ writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
+
+ if (boot_is_swapped()) {
+ /*
+ * Boot Swap On: boot from external NOR/SRAM
+ * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff.
+ *
+ * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank
+ * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals
+ */
+ writel(0x0000bc01, SBBASE0);
+ } else {
+ /*
+ * Boot Swap Off: boot from mask ROM
+ * 0x00000000-0x01ffffff: mask ROM
+ * 0x02000000-0x03efffff: memory bank (31MB)
+ * 0x03f00000-0x03ffffff: peripherals (1MB)
+ */
+ writel(0x0000be01, SBBASE0); /* dummy */
+ writel(0x0200be01, SBBASE1);
+ }
+}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c
index 4839c94..374a8c0 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
@@ -7,8 +7,8 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sbc-regs.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sbc-regs.h>
+#include <mach/sg-regs.h>
void sbc_init(void)
{
@@ -25,13 +25,12 @@ void sbc_init(void)
writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
-#if !defined(CONFIG_SPL_BUILD)
/* XECS0: boot/sub memory (boot swap = off/on) */
writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00);
writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01);
writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02);
writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04);
-#endif
+
/* XECS3: peripherals */
writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30);
writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31);
@@ -43,9 +42,9 @@ void sbc_init(void)
writel(0x0400bc01, SBBASE1);
writel(0x0800bf01, SBBASE3);
-#if !defined(CONFIG_SPL_BUILD)
/* enable access to sub memory when boot swap is on */
- sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */
-#endif
+ if (boot_is_swapped())
+ sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */
+
sg_set_pinsel(156, 1); /* PORT25 -> XECS3 */
}
diff --git a/arch/arm/mach-uniphier/ph1-ld4/sg_init.c b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c
new file mode 100644
index 0000000..93e44af
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <mach/sg-regs.h>
+
+void sg_init(void)
+{
+ u32 tmp;
+
+ /* Input ports must be enabled before deasserting reset of cores */
+ tmp = readl(SG_IECTRL);
+ tmp |= 0x1;
+ writel(tmp, SG_IECTRL);
+}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c b/arch/arm/mach-uniphier/ph1-ld4/umc_init.c
index bbc3dcb..081b028 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c
+++ b/arch/arm/mach-uniphier/ph1-ld4/umc_init.c
@@ -6,8 +6,8 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/umc-regs.h>
-#include <asm/arch/ddrphy-regs.h>
+#include <mach/umc-regs.h>
+#include <mach/ddrphy-regs.h>
static void umc_start_ssif(void __iomem *ssif_base)
{
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile
index 72f4663..b88525c 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
+++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile
@@ -4,10 +4,12 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
-obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o clkrst_init.o \
+obj-y += sg_init.o pll_init.o early_clkrst_init.o \
pll_spectrum.o umc_init.o ddrphy_init.o
+obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o
+obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o
else
-obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o
+obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o
endif
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/boot-mode.c b/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c
index c31b74b..9894c1a 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/boot-mode.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c
@@ -8,9 +8,9 @@
#include <common.h>
#include <spl.h>
#include <asm/io.h>
-#include <asm/arch/boot-device.h>
-#include <asm/arch/sg-regs.h>
-#include <asm/arch/sbc-regs.h>
+#include <mach/boot-device.h>
+#include <mach/sg-regs.h>
+#include <mach/sbc-regs.h>
struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"},
diff --git a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c
new file mode 100644
index 0000000..054efa6
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <mach/sc-regs.h>
+
+void clkrst_init(void)
+{
+ u32 tmp;
+
+ /* deassert reset */
+ tmp = readl(SC_RSTCTRL);
+#ifdef CONFIG_USB_XHCI_UNIPHIER
+ tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
+ SC_RSTCTRL_NRST_GIO;
+#endif
+#ifdef CONFIG_UNIPHIER_ETH
+ tmp |= SC_RSTCTRL_NRST_ETHER;
+#endif
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+ tmp |= SC_RSTCTRL_NRST_STDMAC;
+#endif
+#ifdef CONFIG_NAND_DENALI
+ tmp |= SC_RSTCTRL_NRST_NAND;
+#endif
+ writel(tmp, SC_RSTCTRL);
+ readl(SC_RSTCTRL); /* dummy read */
+
+#ifdef CONFIG_USB_XHCI_UNIPHIER
+ tmp = readl(SC_RSTCTRL2);
+ tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1;
+ writel(tmp, SC_RSTCTRL2);
+ readl(SC_RSTCTRL2); /* dummy read */
+#endif
+
+ /* privide clocks */
+ tmp = readl(SC_CLKCTRL);
+#ifdef CONFIG_USB_XHCI_UNIPHIER
+ tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
+ SC_CLKCTRL_CEN_GIO;
+#endif
+#ifdef CONFIG_UNIPHIER_ETH
+ tmp |= SC_CLKCTRL_CEN_ETHER;
+#endif
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+ tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
+#endif
+#ifdef CONFIG_NAND_DENALI
+ tmp |= SC_CLKCTRL_CEN_NAND;
+#endif
+ writel(tmp, SC_CLKCTRL);
+ readl(SC_CLKCTRL); /* dummy read */
+}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c
index c5d1f60..7df5aea 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/ddrphy_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c
@@ -6,7 +6,7 @@
#include <linux/types.h>
#include <asm/io.h>
-#include <asm/arch/ddrphy-regs.h>
+#include <mach/ddrphy-regs.h>
void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size)
{
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c
index 18965a9..37bb79e 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c
@@ -1,29 +1,31 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
+#include <spl.h>
#include <asm/io.h>
-#include <asm/arch/sc-regs.h>
+#include <mach/sc-regs.h>
-void clkrst_init(void)
+void early_clkrst_init(void)
{
u32 tmp;
/* deassert reset */
tmp = readl(SC_RSTCTRL);
- tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1
- | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND;
+
+ tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0;
+ if (spl_boot_device() != BOOT_DEVICE_NAND)
+ tmp &= ~SC_RSTCTRL_NRST_NAND;
writel(tmp, SC_RSTCTRL);
readl(SC_RSTCTRL); /* dummy read */
/* privide clocks */
tmp = readl(SC_CLKCTRL);
- tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC
- | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI;
+ tmp |= SC_CLKCTRL_CEN_UMC | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
readl(SC_CLKCTRL); /* dummy read */
}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S
index a793b7c..fcaf6d1 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S
+++ b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S
@@ -8,16 +8,16 @@
*/
#include <linux/linkage.h>
-#include <asm/arch/sc-regs.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sc-regs.h>
+#include <mach/sg-regs.h>
#define UART_CLK 73728000
-#include <asm/arch/debug-uart.S>
+#include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug)
ldr r0, =SC_CLKCTRL
ldr r1, [r0]
- orr r1, r1, #SC_CLKCTRL_CLK_PERI
+ orr r1, r1, #SC_CLKCTRL_CEN_PERI
str r1, [r0]
init_debug_uart r0, r1, r2
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c
index 4e3d476..f382ef4 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pinctrl.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sg-regs.h>
void pin_init(void)
{
@@ -41,6 +41,13 @@ void pin_init(void)
sg_set_pinsel(54, 0); /* NRYBY0 -> NRYBY0 */
#endif
+#ifdef CONFIG_USB_XHCI_UNIPHIER
+ sg_set_pinsel(180, 0); /* USB0VBUS -> USB0VBUS */
+ sg_set_pinsel(181, 0); /* USB0OD -> USB0OD */
+ sg_set_pinsel(182, 0); /* USB1VBUS -> USB1VBUS */
+ sg_set_pinsel(183, 0); /* USB1OD -> USB1OD */
+#endif
+
#ifdef CONFIG_USB_EHCI_UNIPHIER
sg_set_pinsel(184, 0); /* USB2VBUS -> USB2VBUS */
sg_set_pinsel(185, 0); /* USB2OD -> USB2OD */
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c b/arch/arm/mach-uniphier/ph1-pro4/platdevice.c
index 31ee2a2..7440ced 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/platdevice.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/arch/platdevice.h>
+#include <mach/platdevice.h>
#define UART_MASTER_CLK 73728000
@@ -13,12 +13,3 @@ SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)
-
-struct uniphier_ehci_platform_data uniphier_ehci_platdata[] = {
- {
- .base = 0x5a800100,
- },
- {
- .base = 0x5a810100,
- },
-};
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
index 1db90f8..2a965a5 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
@@ -6,8 +6,8 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sc-regs.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sc-regs.h>
+#include <mach/sg-regs.h>
#undef DPLL_SSC_RATE_1PER
@@ -46,22 +46,6 @@ static void dpll_init(void)
writel(tmp, SC_DPLLCTRL2);
}
-static void stop_mpll(void)
-{
- u32 tmp;
-
- tmp = readl(SC_MPLLOSCCTL);
-
- if (!(tmp & SC_MPLLOSCCTL_MPLLST))
- return; /* already stopped */
-
- tmp &= ~SC_MPLLOSCCTL_MPLLEN;
- writel(tmp, SC_MPLLOSCCTL);
-
- while (readl(SC_MPLLOSCCTL) & SC_MPLLOSCCTL_MPLLST)
- ;
-}
-
static void vpll_init(void)
{
u32 tmp, clk_mode_axosel;
@@ -157,7 +141,6 @@ static void vpll_init(void)
void pll_init(void)
{
dpll_init();
- stop_mpll();
vpll_init();
/*
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c
index 4538d1a..ff9c73f 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_spectrum.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sc-regs.h>
+#include <mach/sc-regs.h>
void enable_dpll_ssc(void)
{
diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c
new file mode 100644
index 0000000..5e75454
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <mach/sbc-regs.h>
+#include <mach/sg-regs.h>
+
+void sbc_init(void)
+{
+ /*
+ * Only CS1 is connected to support card.
+ * BKSZ[1:0] should be set to "01".
+ */
+ writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
+ writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
+ writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
+ writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
+
+ if (boot_is_swapped()) {
+ /*
+ * Boot Swap On: boot from external NOR/SRAM
+ * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff.
+ *
+ * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank
+ * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals
+ */
+ writel(0x0000bc01, SBBASE0);
+ } else {
+ /*
+ * Boot Swap Off: boot from mask ROM
+ * 0x00000000-0x01ffffff: mask ROM
+ * 0x02000000-0x03efffff: memory bank (31MB)
+ * 0x03f00000-0x03ffffff: peripherals (1MB)
+ */
+ writel(0x0000be01, SBBASE0); /* dummy */
+ writel(0x0200be01, SBBASE1);
+ }
+}
diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c
new file mode 100644
index 0000000..67e6d82
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <mach/sbc-regs.h>
+#include <mach/sg-regs.h>
+
+void sbc_init(void)
+{
+ /* XECS0: boot/sub memory (boot swap = off/on) */
+ writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00);
+ writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01);
+ writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02);
+ writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04);
+
+ /* XECS1: sub/boot memory (boot swap = off/on) */
+ writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
+ writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);
+ writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
+ writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
+
+ /* XECS3: peripherals */
+ writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30);
+ writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31);
+ writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32);
+ writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34);
+
+ writel(0x0000bc01, SBBASE0); /* boot memory */
+ writel(0x0400bc01, SBBASE1); /* sub memory */
+ writel(0x0800bf01, SBBASE3); /* peripherals */
+
+ /* enable access to sub memory when boot swap is on */
+ if (boot_is_swapped())
+ sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */
+
+ sg_set_pinsel(313, 5); /* PORT15 -> XECS3 */
+ writel(0x00000001, SG_LOADPINCTRL);
+}
diff --git a/arch/arm/mach-uniphier/ph1-pro4/sg_init.c b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c
new file mode 100644
index 0000000..8677666
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2011-2015 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <mach/sg-regs.h>
+
+void sg_init(void)
+{
+ u32 tmp;
+
+ /* Input ports must be enabled before deasserting reset of cores */
+ tmp = readl(SG_IECTRL);
+ tmp |= 1 << 6;
+ writel(tmp, SG_IECTRL);
+}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c b/arch/arm/mach-uniphier/ph1-pro4/umc_init.c
index 2d1bde6..6cbb6b2 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/umc_init.c
@@ -6,8 +6,8 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/umc-regs.h>
-#include <asm/arch/ddrphy-regs.h>
+#include <mach/umc-regs.h>
+#include <mach/ddrphy-regs.h>
static void umc_start_ssif(void __iomem *ssif_base)
{
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile b/arch/arm/mach-uniphier/ph1-sld8/Makefile
index 72f4663..5ce3d8a 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile
+++ b/arch/arm/mach-uniphier/ph1-sld8/Makefile
@@ -4,10 +4,12 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
-obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o clkrst_init.o \
+obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \
pll_spectrum.o umc_init.o ddrphy_init.o
+obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o
+obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o
else
-obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o
+obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o
obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o
endif
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/bcu_init.c b/arch/arm/mach-uniphier/ph1-sld8/bcu_init.c
index 69b172e..69b172e 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/bcu_init.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/bcu_init.c
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/boot-mode.c b/arch/arm/mach-uniphier/ph1-sld8/boot-mode.c
index d359b56..d359b56 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/boot-mode.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/boot-mode.c
diff --git a/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c
new file mode 100644
index 0000000..8d3435d
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c
@@ -0,0 +1 @@
+#include "../ph1-ld4/clkrst_init.c"
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c
index a5eafef..304edfb 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/ddrphy_init.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c
@@ -7,7 +7,7 @@
#include <config.h>
#include <linux/types.h>
#include <asm/io.h>
-#include <asm/arch/ddrphy-regs.h>
+#include <mach/ddrphy-regs.h>
void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size)
{
diff --git a/arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c
new file mode 100644
index 0000000..dd236b7
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c
@@ -0,0 +1 @@
+#include "../ph1-ld4/early_clkrst_init.c"
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S
index a413e5f..73f0f63 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S
+++ b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S
@@ -8,10 +8,10 @@
*/
#include <linux/linkage.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sg-regs.h>
#define UART_CLK 80000000
-#include <asm/arch/debug-uart.S>
+#include <mach/debug-uart.S>
ENTRY(setup_lowlevel_debug)
init_debug_uart r0, r1, r2
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c
index 5e80335..4c494ff 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pinctrl.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c
@@ -6,7 +6,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sg-regs.h>
void pin_init(void)
{
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c b/arch/arm/mach-uniphier/ph1-sld8/platdevice.c
index ea0691d..aa334a1 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/platdevice.c
@@ -1,11 +1,11 @@
/*
- * Copyright (C) 2014 Panasonic Corporation
+ * Copyright (C) 2014-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/arch/platdevice.h>
+#include <mach/platdevice.h>
#define UART_MASTER_CLK 80000000
@@ -13,15 +13,3 @@ SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)
-
-struct uniphier_ehci_platform_data uniphier_ehci_platdata[] = {
- {
- .base = 0x5a800100,
- },
- {
- .base = 0x5a810100,
- },
- {
- .base = 0x5a820100,
- },
-};
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c b/arch/arm/mach-uniphier/ph1-sld8/pll_init.c
index 4b82700..8851007 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/pll_init.c
@@ -6,8 +6,8 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sc-regs.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sc-regs.h>
+#include <mach/sg-regs.h>
static void dpll_init(void)
{
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-sld8/pll_spectrum.c
index 9b8c485..9b8c485 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_spectrum.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/pll_spectrum.c
diff --git a/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c
new file mode 100644
index 0000000..225c0d2
--- /dev/null
+++ b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c
@@ -0,0 +1 @@
+#include "../ph1-ld4/sbc_init.c"
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c
index 5efee9c..fdef88e 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011-2014 Panasonic Corporation
+ * Copyright (C) 2011-2015 Panasonic Corporation
* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
*
* SPDX-License-Identifier: GPL-2.0+
@@ -7,8 +7,8 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sbc-regs.h>
-#include <asm/arch/sg-regs.h>
+#include <mach/sbc-regs.h>
+#include <mach/sg-regs.h>
void sbc_init(void)
{
@@ -19,18 +19,18 @@ void sbc_init(void)
tmp &= 0xfffffcff;
writel(tmp, PC0CTRL);
-#if !defined(CONFIG_SPL_BUILD)
- /* XECS0 : dummy */
- writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00);
- writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01);
- writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02);
- writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04);
-#endif
- /* XECS1 : boot memory (always boot swap = on) */
- writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
- writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);
- writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
- writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
+ /*
+ * SBCTRL0* does not need settings because PH1-sLD8 has no support for
+ * XECS0. The boot swap must be enabled to boot from the support card.
+ */
+
+ if (boot_is_swapped()) {
+ /* XECS1 : boot memory if boot swap is on */
+ writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
+ writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);
+ writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
+ writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
+ }
/* XECS4 : sub memory */
writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL40);
@@ -54,5 +54,5 @@ void sbc_init(void)
sg_set_pinsel(135, 16); /* XIRQ7 -> XECS5 */
/* dummy read to assure write process */
- readl(SG_PINCTRL(33));
+ readl(SG_PINCTRL(0));
}
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/sg_init.c b/arch/arm/mach-uniphier/ph1-sld8/sg_init.c
index a808289..a808289 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/sg_init.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/sg_init.c
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c b/arch/arm/mach-uniphier/ph1-sld8/umc_init.c
index 2fbc73a..302611e 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c
+++ b/arch/arm/mach-uniphier/ph1-sld8/umc_init.c
@@ -6,8 +6,8 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/umc-regs.h>
-#include <asm/arch/ddrphy-regs.h>
+#include <mach/umc-regs.h>
+#include <mach/ddrphy-regs.h>
static void umc_start_ssif(void __iomem *ssif_base)
{
diff --git a/arch/arm/cpu/armv7/uniphier/print_misc_info.c b/arch/arm/mach-uniphier/print_misc_info.c
index 69cfab5..22ea512 100644
--- a/arch/arm/cpu/armv7/uniphier/print_misc_info.c
+++ b/arch/arm/mach-uniphier/print_misc_info.c
@@ -5,7 +5,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <asm/arch/board.h>
+#include <mach/board.h>
int misc_init_f(void)
{
diff --git a/arch/arm/cpu/armv7/uniphier/reset.c b/arch/arm/mach-uniphier/reset.c
index 50d1fed..005fbcf 100644
--- a/arch/arm/cpu/armv7/uniphier/reset.c
+++ b/arch/arm/mach-uniphier/reset.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/sc-regs.h>
+#include <mach/sc-regs.h>
void reset_cpu(unsigned long ignored)
{
diff --git a/arch/arm/cpu/armv7/uniphier/smp.S b/arch/arm/mach-uniphier/smp.S
index 25ba981..18e3a9d 100644
--- a/arch/arm/cpu/armv7/uniphier/smp.S
+++ b/arch/arm/mach-uniphier/smp.S
@@ -8,8 +8,8 @@
#include <config.h>
#include <linux/linkage.h>
#include <asm/system.h>
-#include <asm/arch/led.h>
-#include <asm/arch/sbc-regs.h>
+#include <mach/led.h>
+#include <mach/sbc-regs.h>
/* Entry point of U-Boot main program for the secondary CPU */
LENTRY(secondary_entry)
diff --git a/arch/arm/cpu/armv7/uniphier/spl.c b/arch/arm/mach-uniphier/spl.c
index 8a4eafc..c3d90d0 100644
--- a/arch/arm/cpu/armv7/uniphier/spl.c
+++ b/arch/arm/mach-uniphier/spl.c
@@ -8,8 +8,8 @@
#include <common.h>
#include <spl.h>
#include <linux/compiler.h>
-#include <asm/arch/led.h>
-#include <asm/arch/board.h>
+#include <mach/led.h>
+#include <mach/board.h>
void __weak bcu_init(void)
{
@@ -18,7 +18,8 @@ void sbc_init(void);
void sg_init(void);
void pll_init(void);
void pin_init(void);
-void clkrst_init(void);
+void memconf_init(void);
+void early_clkrst_init(void);
int umc_init(void);
void enable_dpll_ssc(void);
@@ -38,10 +39,14 @@ void spl_board_init(void)
led_write(L, 0, , );
- clkrst_init();
+ memconf_init();
led_write(L, 1, , );
+ early_clkrst_init();
+
+ led_write(L, 2, , );
+
{
int res;
@@ -51,9 +56,9 @@ void spl_board_init(void)
;
}
}
- led_write(L, 2, , );
+ led_write(L, 3, , );
enable_dpll_ssc();
- led_write(L, 3, , );
+ led_write(L, 4, , );
}
diff --git a/arch/arm/cpu/armv7/uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c
index 443224c..e7b4158 100644
--- a/arch/arm/cpu/armv7/uniphier/support_card.c
+++ b/arch/arm/mach-uniphier/support_card.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/board.h>
+#include <mach/board.h>
#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
@@ -112,7 +112,7 @@ int board_eth_init(bd_t *bis)
#if !defined(CONFIG_SYS_NO_FLASH)
#include <mtd/cfi_flash.h>
-#include <asm/arch/sbc-regs.h>
+#include <mach/sbc-regs.h>
struct memory_bank {
phys_addr_t base;
diff --git a/arch/arm/cpu/armv7/uniphier/timer.c b/arch/arm/mach-uniphier/timer.c
index 6edc084..adef08d 100644
--- a/arch/arm/cpu/armv7/uniphier/timer.c
+++ b/arch/arm/mach-uniphier/timer.c
@@ -7,7 +7,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/arm-mpcore.h>
+#include <mach/arm-mpcore.h>
#define PERIPHCLK (50 * 1000 * 1000) /* 50 MHz */
#define PRESCALER ((PERIPHCLK) / (CONFIG_SYS_TIMER_RATE) - 1)