diff options
| author | Tom Rini <trini@konsulko.com> | 2016-09-09 09:45:32 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-09-09 09:45:32 -0400 |
| commit | 16f416661ec5ffa46b3f879a0b83907bbec13714 (patch) | |
| tree | 4674f10254e3d773b39a21552c108214795dddec /arch | |
| parent | 01c5075506afcb7a74e0db8600af8979f45881b5 (diff) | |
| parent | d4ee5043f36e7a418c3fb5be2e76eb5f6ee2cd9f (diff) | |
| download | u-boot-imx-16f416661ec5ffa46b3f879a0b83907bbec13714.zip u-boot-imx-16f416661ec5ffa46b3f879a0b83907bbec13714.tar.gz u-boot-imx-16f416661ec5ffa46b3f879a0b83907bbec13714.tar.bz2 | |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/Kconfig | 5 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/ddr.c | 6 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 |
3 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 78383f0..4214ab5 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -35,6 +35,10 @@ choice prompt "MX6 board select" optional +config TARGET_ADVANTECH_DMS_BA16 + bool "Advantech dms-ba16" + select MX6Q + config TARGET_ARISTAINETOS bool "aristainetos" @@ -200,6 +204,7 @@ config SYS_SOC default "mx6" source "board/ge/bx50v3/Kconfig" +source "board/advantech/dms-ba16/Kconfig" source "board/aristainetos/Kconfig" source "board/bachmann/ot1200/Kconfig" source "board/barco/platinum/Kconfig" diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index f151eec..7beb7ea 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -1166,8 +1166,7 @@ void mx6_lpddr2_cfg(const struct mx6_ddr_sysinfo *sysinfo, mmdc0->mpzqhwctrl = val; /* Step 12: Configure and activate periodic refresh */ - mmdc0->mdref = (0 << 14) | /* REF_SEL: Periodic refresh cycle: 64kHz */ - (3 << 11); /* REFR: Refresh Rate - 4 refreshes */ + mmdc0->mdref = (sysinfo->refsel << 14) | (sysinfo->refr << 11); /* Step 13: Deassert config request - init complete */ mmdc0->mdscr = 0x00000000; @@ -1472,8 +1471,7 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, MMDC1(mpzqhwctrl, val); /* Step 12: Configure and activate periodic refresh */ - mmdc0->mdref = (1 << 14) | /* REF_SEL: Periodic refresh cycle: 32kHz */ - (7 << 11); /* REFR: Refresh Rate - 8 refreshes */ + mmdc0->mdref = (sysinfo->refsel << 14) | (sysinfo->refr << 11); /* Step 13: Deassert config request - init complete */ mmdc0->mdscr = 0x00000000; diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h index 12c30d2..9922409 100644 --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h @@ -408,6 +408,8 @@ struct mx6_ddr_sysinfo { u8 sde_to_rst; /* Time from SDE enable until DDR reset# is high */ u8 pd_fast_exit;/* enable precharge powerdown fast-exit */ u8 ddr_type; /* DDR type: DDR3(0) or LPDDR2(1) */ + u8 refsel; /* REF_SEL field of register MDREF */ + u8 refr; /* REFR field of register MDREF */ }; /* |