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authorTom Rini <trini@konsulko.com>2016-01-12 18:12:42 -0500
committerTom Rini <trini@konsulko.com>2016-01-12 18:12:42 -0500
commit077678eb0c226e52a1f90edabd3369ab26065b32 (patch)
treee8bf70144f896a1ea09f694fe1182ba305b25df9 /arch
parente69514cc7087255d0e9754a9bf04129309d81ed5 (diff)
parentab971e192adcf0a501c8998542ab116512c0c260 (diff)
downloadu-boot-imx-077678eb0c226e52a1f90edabd3369ab26065b32.zip
u-boot-imx-077678eb0c226e52a1f90edabd3369ab26065b32.tar.gz
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Merge git://git.denx.de/u-boot-dm
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-rockchip/Makefile1
-rw-r--r--arch/arm/mach-rockchip/rk3036-board-spl.c9
-rw-r--r--arch/arm/mach-rockchip/rk_early_print.c63
-rw-r--r--arch/arm/mach-tegra/Kconfig1
-rw-r--r--arch/sandbox/cpu/eth-raw-os.c4
-rw-r--r--arch/x86/cpu/baytrail/valleyview.c4
-rw-r--r--arch/x86/cpu/ivybridge/bd82x6x.c6
-rw-r--r--arch/x86/cpu/ivybridge/gma.c15
-rw-r--r--arch/x86/cpu/quark/quark.c4
-rw-r--r--arch/x86/cpu/queensbay/topcliff.c4
-rw-r--r--arch/x86/include/asm/arch-ivybridge/bd82x6x.h3
-rw-r--r--arch/x86/lib/bios.c3
-rw-r--r--arch/x86/lib/bios_interrupts.c36
13 files changed, 56 insertions, 97 deletions
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index b703c3c..1cc4a96 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -11,7 +11,6 @@ else
obj-$(CONFIG_ROCKCHIP_RK3288) += board.o
endif
obj-y += rk_timer.o
-obj-y += rk_early_print.o
obj-$(CONFIG_$(SPL_)ROCKCHIP_COMMON) += common.o
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 3a1491c..8015481 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <debug_uart.h>
#include <asm/io.h>
#include <asm/arch/grf_rk3036.h>
#include <asm/arch/hardware.h>
@@ -34,7 +35,7 @@ void board_init_f(ulong dummy)
GPIO1C2_MASK << GPIO1C2_SHIFT,
GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
- rk_uart_init((void *)DEBUG_UART_BASE);
+ debug_uart_init();
#endif
rockchip_timer_init();
sdram_init();
@@ -53,3 +54,9 @@ void board_init_r(gd_t *id, ulong dest_addr)
while (1)
;
}
+
+void hang(void)
+{
+ while (1)
+ ;
+}
diff --git a/arch/arm/mach-rockchip/rk_early_print.c b/arch/arm/mach-rockchip/rk_early_print.c
deleted file mode 100644
index a1c14b0..0000000
--- a/arch/arm/mach-rockchip/rk_early_print.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <asm/io.h>
-#include <asm/arch/uart.h>
-#include <common.h>
-
-static struct rk_uart *uart_ptr;
-
-static void uart_wrtie_byte(char byte)
-{
- writel(byte, &uart_ptr->rbr);
- while (!(readl(&uart_ptr->lsr) & 0x40))
- ;
-}
-
-void print(char *s)
-{
- while (*s) {
- if (*s == '\n')
- uart_wrtie_byte('\r');
- uart_wrtie_byte(*s);
- s++;
- }
-}
-
-void print_hex(unsigned int n)
-{
- int i;
- int temp;
-
- uart_wrtie_byte('0');
- uart_wrtie_byte('x');
-
- for (i = 8; i > 0; i--) {
- temp = (n >> (i - 1) * 4) & 0x0f;
- if (temp < 10)
- uart_wrtie_byte((char)(temp + '0'));
- else
- uart_wrtie_byte((char)(temp - 10 + 'a'));
- }
- uart_wrtie_byte('\n');
- uart_wrtie_byte('\r');
-}
-
-/*
- * TODO: since rk3036 only 4K sram to use in SPL, for saving space,
- * we implement uart driver this way, we should convert this to use
- * ns16550 driver in future, which support DEBUG_UART in the standard way
- */
-void rk_uart_init(void *base)
-{
- uart_ptr = (struct rk_uart *)base;
- writel(0x83, &uart_ptr->lcr);
- writel(0x0d, &uart_ptr->rbr);
- writel(0x03, &uart_ptr->lcr);
-
- /* fifo enable, sfe is shadow register of FCR[0] */
- writel(0x01, &uart_ptr->sfe);
-}
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index fbfb204..48a387c 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -3,6 +3,7 @@ if TEGRA
config TEGRA_COMMON
bool "Tegra common options"
select DM
+ select DM_ETH
select DM_GPIO
select DM_I2C
select DM_KEYBOARD
diff --git a/arch/sandbox/cpu/eth-raw-os.c b/arch/sandbox/cpu/eth-raw-os.c
index b76a731..528865f 100644
--- a/arch/sandbox/cpu/eth-raw-os.c
+++ b/arch/sandbox/cpu/eth-raw-os.c
@@ -76,6 +76,10 @@ static int _raw_packet_start(const char *ifname, unsigned char *ethmac,
printf("Failed to set promiscuous mode: %d %s\n"
"Falling back to the old \"flags\" way...\n",
errno, strerror(errno));
+ if (strlen(ifname) >= IFNAMSIZ) {
+ printf("Interface name %s is too long.\n", ifname);
+ return -EINVAL;
+ }
strncpy(ifr.ifr_name, ifname, IFNAMSIZ);
if (ioctl(priv->sd, SIOCGIFFLAGS, &ifr) < 0) {
printf("Failed to read flags: %d %s\n", errno,
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index 9b30451..7299f2c 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -14,12 +14,12 @@
static struct pci_device_id mmc_supported[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD },
+ {},
};
int cpu_mmc_init(bd_t *bis)
{
- return pci_mmc_init("ValleyView SDHCI", mmc_supported,
- ARRAY_SIZE(mmc_supported));
+ return pci_mmc_init("ValleyView SDHCI", mmc_supported);
}
#ifndef CONFIG_EFI_APP
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index 3e7a907..434dfd6 100644
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -86,8 +86,10 @@ static int bd82x6x_probe(struct udevice *dev)
debug("%s: Cannot find GMA node\n", __func__);
return -EINVAL;
}
- ret = gma_func0_init(PCH_VIDEO_DEV, pci_bus_to_hose(0), blob,
- gma_node);
+ ret = dm_pci_bus_find_bdf(PCH_VIDEO_DEV, &dev);
+ if (ret)
+ return ret;
+ ret = gma_func0_init(dev, blob, gma_node);
if (ret)
return ret;
diff --git a/arch/x86/cpu/ivybridge/gma.c b/arch/x86/cpu/ivybridge/gma.c
index 89d4a5e..85a09c6 100644
--- a/arch/x86/cpu/ivybridge/gma.c
+++ b/arch/x86/cpu/ivybridge/gma.c
@@ -728,8 +728,7 @@ static int int15_handler(void)
return res;
}
-int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
- const void *blob, int node)
+int gma_func0_init(struct udevice *dev, const void *blob, int node)
{
#ifdef CONFIG_VIDEO
ulong start;
@@ -740,16 +739,16 @@ int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
int ret;
/* IGD needs to be Bus Master */
- reg32 = x86_pci_read_config32(dev, PCI_COMMAND);
+ dm_pci_read_config32(dev, PCI_COMMAND, &reg32);
reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
- x86_pci_write_config32(dev, PCI_COMMAND, reg32);
+ dm_pci_write_config32(dev, PCI_COMMAND, reg32);
/* Use write-combining for the graphics memory, 256MB */
- base = pci_read_bar32(hose, dev, 2);
+ base = dm_pci_read_bar32(dev, 2);
mtrr_add_request(MTRR_TYPE_WRCOMB, base, 256 << 20);
mtrr_commit(true);
- gtt_bar = (void *)pci_read_bar32(pci_bus_to_hose(0), dev, 0);
+ gtt_bar = (void *)dm_pci_read_bar32(dev, 0);
debug("GT bar %p\n", gtt_bar);
ret = gma_pm_init_pre_vbios(gtt_bar);
if (ret)
@@ -757,8 +756,8 @@ int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
#ifdef CONFIG_VIDEO
start = get_timer(0);
- ret = pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
- PCI_ROM_ALLOW_FALLBACK);
+ ret = dm_pci_run_vga_bios(dev, int15_handler,
+ PCI_ROM_USE_NATIVE | PCI_ROM_ALLOW_FALLBACK);
debug("BIOS ran in %lums\n", get_timer(start));
#endif
/* Post VBIOS init */
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index c2bf497..37ce394 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -19,6 +19,7 @@
static struct pci_device_id mmc_supported[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO },
+ {},
};
/*
@@ -337,8 +338,7 @@ int arch_early_init_r(void)
int cpu_mmc_init(bd_t *bis)
{
- return pci_mmc_init("Quark SDHCI", mmc_supported,
- ARRAY_SIZE(mmc_supported));
+ return pci_mmc_init("Quark SDHCI", mmc_supported);
}
void cpu_irq_init(void)
diff --git a/arch/x86/cpu/queensbay/topcliff.c b/arch/x86/cpu/queensbay/topcliff.c
index 9faf1b9..b76dd7d 100644
--- a/arch/x86/cpu/queensbay/topcliff.c
+++ b/arch/x86/cpu/queensbay/topcliff.c
@@ -11,10 +11,10 @@
static struct pci_device_id mmc_supported[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
+ {},
};
int cpu_mmc_init(bd_t *bis)
{
- return pci_mmc_init("Topcliff SDHCI", mmc_supported,
- ARRAY_SIZE(mmc_supported));
+ return pci_mmc_init("Topcliff SDHCI", mmc_supported);
}
diff --git a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
index 7786493..fcdf6e2 100644
--- a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
+++ b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
@@ -12,8 +12,7 @@ void bd82x6x_sata_enable(pci_dev_t dev, const void *blob, int node);
void bd82x6x_pci_init(pci_dev_t dev);
void bd82x6x_usb_ehci_init(pci_dev_t dev);
void bd82x6x_usb_xhci_init(pci_dev_t dev);
-int gma_func0_init(pci_dev_t dev, struct pci_controller *hose,
- const void *blob, int node);
+int gma_func0_init(struct udevice *dev, const void *blob, int node);
int bd82x6x_init(void);
/**
diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c
index 1d75cfc..9324bdb 100644
--- a/arch/x86/lib/bios.c
+++ b/arch/x86/lib/bios.c
@@ -242,9 +242,10 @@ static void vbe_set_graphics(int vesa_mode, struct vbe_mode_info *mode_info)
vbe_set_mode(mode_info);
}
-void bios_run_on_x86(pci_dev_t pcidev, unsigned long addr, int vesa_mode,
+void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode,
struct vbe_mode_info *mode_info)
{
+ pci_dev_t pcidev = dm_pci_get_bdf(dev);
u32 num_dev;
num_dev = PCI_BUS(pcidev) << 8 | PCI_DEV(pcidev) << 3 |
diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c
index 47d9f59..e8ca6e6 100644
--- a/arch/x86/lib/bios_interrupts.c
+++ b/arch/x86/lib/bios_interrupts.c
@@ -105,13 +105,15 @@ int int1a_handler(void)
unsigned short func = (unsigned short)M.x86.R_EAX;
int retval = 1;
unsigned short devid, vendorid, devfn;
+ struct udevice *dev;
/* Use short to get rid of gabage in upper half of 32-bit register */
short devindex;
unsigned char bus;
- pci_dev_t dev;
+ pci_dev_t bdf;
u32 dword;
u16 word;
u8 byte, reg;
+ int ret;
switch (func) {
case 0xb101: /* PCIBIOS Check */
@@ -131,17 +133,20 @@ int int1a_handler(void)
devid = M.x86.R_ECX;
vendorid = M.x86.R_EDX;
devindex = M.x86.R_ESI;
- dev = pci_find_device(vendorid, devid, devindex);
- if (dev != -1) {
+ bdf = -1;
+ ret = dm_pci_find_device(vendorid, devid, devindex, &dev);
+ if (!ret) {
unsigned short busdevfn;
+
+ bdf = dm_pci_get_bdf(dev);
M.x86.R_EAX &= 0xffff00ff; /* Clear AH */
M.x86.R_EAX |= PCIBIOS_SUCCESSFUL;
/*
* busnum is an unsigned char;
* devfn is an int, so we mask it off.
*/
- busdevfn = (PCI_BUS(dev) << 8) | PCI_DEV(dev) << 3 |
- PCI_FUNC(dev);
+ busdevfn = (PCI_BUS(bdf) << 8) | PCI_DEV(bdf) << 3 |
+ PCI_FUNC(bdf);
debug("0x%x: return 0x%x\n", func, busdevfn);
M.x86.R_EBX = busdevfn;
retval = 1;
@@ -160,35 +165,40 @@ int int1a_handler(void)
devfn = M.x86.R_EBX & 0xff;
bus = M.x86.R_EBX >> 8;
reg = M.x86.R_EDI;
- dev = PCI_BDF(bus, devfn >> 3, devfn & 7);
+ bdf = PCI_BDF(bus, devfn >> 3, devfn & 7);
+
+ ret = dm_pci_bus_find_bdf(bdf, &dev);
+ if (ret) {
+ debug("%s: Device %x not found\n", __func__, bdf);
+ break;
+ }
switch (func) {
case 0xb108: /* Read Config Byte */
- byte = x86_pci_read_config8(dev, reg);
+ dm_pci_read_config8(dev, reg, &byte);
M.x86.R_ECX = byte;
break;
case 0xb109: /* Read Config Word */
- word = x86_pci_read_config16(dev, reg);
+ dm_pci_read_config16(dev, reg, &word);
M.x86.R_ECX = word;
break;
case 0xb10a: /* Read Config Dword */
- dword = x86_pci_read_config32(dev, reg);
+ dm_pci_read_config32(dev, reg, &dword);
M.x86.R_ECX = dword;
break;
case 0xb10b: /* Write Config Byte */
byte = M.x86.R_ECX;
- x86_pci_write_config8(dev, reg, byte);
+ dm_pci_write_config8(dev, reg, byte);
break;
case 0xb10c: /* Write Config Word */
word = M.x86.R_ECX;
- x86_pci_write_config16(dev, reg, word);
+ dm_pci_write_config16(dev, reg, word);
break;
case 0xb10d: /* Write Config Dword */
dword = M.x86.R_ECX;
- x86_pci_write_config32(dev, reg, dword);
+ dm_pci_write_config32(dev, reg, dword);
break;
}
-
#ifdef CONFIG_REALMODE_DEBUG
debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n", func,
bus, devfn, reg, M.x86.R_ECX);