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authorWolfgang Denk <wd@denx.de>2012-07-22 00:10:39 +0200
committerWolfgang Denk <wd@denx.de>2012-07-22 00:10:39 +0200
commit00d8f4cd82fa2bb0be379021b5ecc170d2335906 (patch)
treec87ec7c2cda6e8d0562a6e5d8eb8b7da4271c773 /arch
parent569fadcd74ff2c7b456dfaa368b9f6144bc7ab3a (diff)
parentf8f09dd40423b7f9ea0f0b810a8f5da9cd580a17 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: ARM1136: Fix cache range checks mx6: Make pad name macro consistent with the datasheet mx28: Fix elftosb source link in README.mx28_common doc: README.mx28_common: Add missing entry into Contents Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/arm1136/cpu.c6
-rw-r--r--arch/arm/include/asm/arch-mx6/mx6x_pins.h4
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/cpu/arm1136/cpu.c b/arch/arm/cpu/arm1136/cpu.c
index f72bab6..b98e3d9 100644
--- a/arch/arm/cpu/arm1136/cpu.c
+++ b/arch/arm/cpu/arm1136/cpu.c
@@ -95,7 +95,7 @@ void flush_dcache_all(void)
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
}
-static inline int bad_cache_range(unsigned long start, unsigned long stop)
+static int check_cache_range(unsigned long start, unsigned long stop)
{
int ok = 1;
@@ -114,7 +114,7 @@ static inline int bad_cache_range(unsigned long start, unsigned long stop)
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
- if (bad_cache_range(start, stop))
+ if (!check_cache_range(start, stop))
return;
while (start < stop) {
@@ -125,7 +125,7 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop)
void flush_dcache_range(unsigned long start, unsigned long stop)
{
- if (bad_cache_range(start, stop))
+ if (!check_cache_range(start, stop))
return;
while (start < stop) {
diff --git a/arch/arm/include/asm/arch-mx6/mx6x_pins.h b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
index 9979651..cf9103c 100644
--- a/arch/arm/include/asm/arch-mx6/mx6x_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
@@ -530,8 +530,8 @@ enum {
MX6Q_PAD_EIM_BCLK__IPU1_DI1_PIN16 = IOMUX_PAD(0x046C, 0x0158, 1, 0x0000, 0, 0),
MX6Q_PAD_EIM_BCLK__GPIO_6_31 = IOMUX_PAD(0x046C, 0x0158, 5, 0x0000, 0, 0),
MX6Q_PAD_EIM_BCLK__TPSMP_HDATA_31 = IOMUX_PAD(0x046C, 0x0158, 6, 0x0000, 0, 0),
- MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DSP_CLK = IOMUX_PAD(0x0470, 0x015C, 0, 0x0000, 0, 0),
- MX6Q_PAD_DI0_DISP_CLK__IPU2_DI0_DSP_CLK = IOMUX_PAD(0x0470, 0x015C, 1, 0x0000, 0, 0),
+ MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK = IOMUX_PAD(0x0470, 0x015C, 0, 0x0000, 0, 0),
+ MX6Q_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK = IOMUX_PAD(0x0470, 0x015C, 1, 0x0000, 0, 0),
MX6Q_PAD_DI0_DISP_CLK__MIPI_CR_DPY_OT28 = IOMUX_PAD(0x0470, 0x015C, 3, 0x0000, 0, 0),
MX6Q_PAD_DI0_DISP_CLK__SDMA_DBG_CR_STA0 = IOMUX_PAD(0x0470, 0x015C, 4, 0x0000, 0, 0),
MX6Q_PAD_DI0_DISP_CLK__GPIO_4_16 = IOMUX_PAD(0x0470, 0x015C, 5, 0x0000, 0, 0),