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authorNaga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>2016-03-11 13:10:26 +0530
committerMichal Simek <michal.simek@xilinx.com>2016-04-13 18:29:04 +0200
commit908690098c1836055ee98bde045308ca2ae5d56e (patch)
tree4ed36ad49767edc11b2e31c843911f5f9eed61a7 /arch
parentb34d11de188186e8ca39de6b4f7453823ab20820 (diff)
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ARM64: zynqmp: Add ddrc node in dts
This patch adds ddrc memory controller node in dts. size mentioned in dts is 0x30000, because we need to access DDR_QOS INTR registers located at fd090208 from this driver. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/zynqmp.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 4520930..b68fb1a 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -506,6 +506,13 @@
power-domains = <&pd_adma>;
};
+ mc: memory-controller@fd070000 {
+ compatible = "xlnx,zynqmp-ddrc-2.40a";
+ reg = <0x0 0xfd070000 0x30000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 112 4>;
+ };
+
nand0: nand@ff100000 {
compatible = "arasan,nfc-v3p10";
status = "disabled";