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author | Mugunthan V N <mugunthanvnm@ti.com> | 2015-11-26 14:49:10 +0530 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2015-12-05 18:22:25 -0500 |
commit | 85cf0e6299cc1909f814fe1ee1a6cf2f7e257bb7 (patch) | |
tree | f5e6a850a83fc648d5f06ec5ce12ef55e0fae10d /arch | |
parent | 746da1bd42aa5ecc47898399514c9c76d0329706 (diff) | |
download | u-boot-imx-85cf0e6299cc1909f814fe1ee1a6cf2f7e257bb7.zip u-boot-imx-85cf0e6299cc1909f814fe1ee1a6cf2f7e257bb7.tar.gz u-boot-imx-85cf0e6299cc1909f814fe1ee1a6cf2f7e257bb7.tar.bz2 |
arm: dts: omap: add reg-shift to serial device tree node
With the commit 'c7b9686d5d48 ("ns16550: unify serial_omap")' all
TI platforms are broken with DM/DT boot as ns16550 driver expects
reg-shift from DT which is not populated for TI platforms.
Earlier it worked as it was hard coded to 2 in serial-omap
driver. So adding the reg-shift to serial nodes for dra7, am4372
and am33xx dtsi files. Tested this patch on am437x-sk-evm,
am437x-gp-evm, am335x-boneblack, dra74x-evm and dra72x-evm.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/am33xx.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/dts/am4372.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/dts/dra7.dtsi | 10 |
3 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi index 21fcc44..b26e21b 100644 --- a/arch/arm/dts/am33xx.dtsi +++ b/arch/arm/dts/am33xx.dtsi @@ -214,6 +214,7 @@ ti,hwmods = "uart1"; clock-frequency = <48000000>; reg = <0x44e09000 0x2000>; + reg-shift = <2>; interrupts = <72>; status = "disabled"; dmas = <&edma 26>, <&edma 27>; @@ -225,6 +226,7 @@ ti,hwmods = "uart2"; clock-frequency = <48000000>; reg = <0x48022000 0x2000>; + reg-shift = <2>; interrupts = <73>; status = "disabled"; dmas = <&edma 28>, <&edma 29>; @@ -236,6 +238,7 @@ ti,hwmods = "uart3"; clock-frequency = <48000000>; reg = <0x48024000 0x2000>; + reg-shift = <2>; interrupts = <74>; status = "disabled"; dmas = <&edma 30>, <&edma 31>; @@ -247,6 +250,7 @@ ti,hwmods = "uart4"; clock-frequency = <48000000>; reg = <0x481a6000 0x2000>; + reg-shift = <2>; interrupts = <44>; status = "disabled"; }; @@ -256,6 +260,7 @@ ti,hwmods = "uart5"; clock-frequency = <48000000>; reg = <0x481a8000 0x2000>; + reg-shift = <2>; interrupts = <45>; status = "disabled"; }; @@ -265,6 +270,7 @@ ti,hwmods = "uart6"; clock-frequency = <48000000>; reg = <0x481aa000 0x2000>; + reg-shift = <2>; interrupts = <46>; status = "disabled"; }; diff --git a/arch/arm/dts/am4372.dtsi b/arch/arm/dts/am4372.dtsi index ade28c7..3fffe1e 100644 --- a/arch/arm/dts/am4372.dtsi +++ b/arch/arm/dts/am4372.dtsi @@ -152,6 +152,7 @@ uart0: serial@44e09000 { compatible = "ti,am4372-uart","ti,omap2-uart"; reg = <0x44e09000 0x2000>; + reg-shift = <2>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; }; @@ -159,6 +160,7 @@ uart1: serial@48022000 { compatible = "ti,am4372-uart","ti,omap2-uart"; reg = <0x48022000 0x2000>; + reg-shift = <2>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; status = "disabled"; @@ -167,6 +169,7 @@ uart2: serial@48024000 { compatible = "ti,am4372-uart","ti,omap2-uart"; reg = <0x48024000 0x2000>; + reg-shift = <2>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; status = "disabled"; @@ -175,6 +178,7 @@ uart3: serial@481a6000 { compatible = "ti,am4372-uart","ti,omap2-uart"; reg = <0x481a6000 0x2000>; + reg-shift = <2>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; status = "disabled"; @@ -183,6 +187,7 @@ uart4: serial@481a8000 { compatible = "ti,am4372-uart","ti,omap2-uart"; reg = <0x481a8000 0x2000>; + reg-shift = <2>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart5"; status = "disabled"; @@ -191,6 +196,7 @@ uart5: serial@481aa000 { compatible = "ti,am4372-uart","ti,omap2-uart"; reg = <0x481aa000 0x2000>; + reg-shift = <2>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart6"; status = "disabled"; diff --git a/arch/arm/dts/dra7.dtsi b/arch/arm/dts/dra7.dtsi index 8f1e25b..feb3708 100644 --- a/arch/arm/dts/dra7.dtsi +++ b/arch/arm/dts/dra7.dtsi @@ -399,6 +399,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; + reg-shift = <2>; interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; clock-frequency = <48000000>; @@ -410,6 +411,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; + reg-shift = <2>; interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; clock-frequency = <48000000>; @@ -421,6 +423,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; + reg-shift = <2>; interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; clock-frequency = <48000000>; @@ -432,6 +435,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; + reg-shift = <2>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; clock-frequency = <48000000>; @@ -443,6 +447,7 @@ uart5: serial@48066000 { compatible = "ti,omap4-uart"; reg = <0x48066000 0x100>; + reg-shift = <2>; interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart5"; clock-frequency = <48000000>; @@ -454,6 +459,7 @@ uart6: serial@48068000 { compatible = "ti,omap4-uart"; reg = <0x48068000 0x100>; + reg-shift = <2>; interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart6"; clock-frequency = <48000000>; @@ -465,6 +471,7 @@ uart7: serial@48420000 { compatible = "ti,omap4-uart"; reg = <0x48420000 0x100>; + reg-shift = <2>; interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart7"; clock-frequency = <48000000>; @@ -474,6 +481,7 @@ uart8: serial@48422000 { compatible = "ti,omap4-uart"; reg = <0x48422000 0x100>; + reg-shift = <2>; interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart8"; clock-frequency = <48000000>; @@ -483,6 +491,7 @@ uart9: serial@48424000 { compatible = "ti,omap4-uart"; reg = <0x48424000 0x100>; + reg-shift = <2>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart9"; clock-frequency = <48000000>; @@ -492,6 +501,7 @@ uart10: serial@4ae2b000 { compatible = "ti,omap4-uart"; reg = <0x4ae2b000 0x100>; + reg-shift = <2>; interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart10"; clock-frequency = <48000000>; |