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authorSimon Glass <sjg@chromium.org>2015-04-28 20:25:14 -0600
committerSimon Glass <sjg@chromium.org>2015-04-29 21:02:34 -0600
commit837a136fc7cfb712858502a03c8d0ae91bea6e0d (patch)
treefec5a7c0728192268577dd5719f550bf3dcf3a63 /arch
parent1a06d2a3106f9de5a4b9bec68593593fcf930e3b (diff)
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x86: Add an mfence macro
Provide access to this x86 instruction from C code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/cpu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index c839291..08284ee 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -151,6 +151,11 @@ static inline int flag_is_changeable_p(uint32_t flag)
return ((f1^f2) & flag) != 0;
}
+static inline void mfence(void)
+{
+ __asm__ __volatile__("mfence" : : : "memory");
+}
+
/**
* cpu_enable_paging_pae() - Enable PAE-paging
*