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authorAndrew F. Davis <afd@ti.com>2017-01-06 16:32:12 -0600
committerTom Rini <trini@konsulko.com>2017-01-08 08:31:46 -0500
commit4d82c4b53e3c911f21383a547477d6f5916c17a7 (patch)
tree8c155d64a2824b9bf018d6ee09329a3878f8f391 /arch
parent7410f1464e3fc2e35761160176c8ce14c5122bc9 (diff)
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am335x: configs: Use ISW_ENTRY_ADDR to set SPL_TEXT_BASE
The SPL load address changes based on boot type in HS devices, ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs for similar reasons. Add this same logic for AM33xx devices. Also make the default value for ISW_ENTRY_ADDR correct for GP devices based on SoC, HS devices already pick the correct value in their defconfig. Signed-off-by: Andrew F. Davis <afd@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/am33xx/Kconfig3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index 8fd32c2..56c4406 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -119,7 +119,8 @@ config ISW_ENTRY_ADDR
point address depending on the device type
(secure/non-secure), boot media (xip/non-xip) and
image headers.
- default 0x402F4000
+ default 0x402F4000 if AM43XX
+ default 0x402F0400 if AM33XX
config PUB_ROM_DATA_SIZE
hex "Size in bytes of the L3 SRAM reserved by ROM to store data"