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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2015-08-06 00:47:10 +0200
committerTom Warren <twarren@nvidia.com>2015-08-13 13:06:03 -0700
commit36a01bdd8046e60d9b249b409457d4fbb5b9396e (patch)
tree673f4fb9aa336912d28285b79595f67099ca076a /arch
parentbaa6f0f1b1fb0d6370181eefb60ad2cf06bbc361 (diff)
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apalis/colibri_t20/30: clean-up
Various clean-ups either in comments, order or spacing without any functional impact: - Add some comments in the device trees resp. reorder some parameters for consistency across all our modules. - Sort some include files alphabetically (while leaving common.h on top of course). - Streamline some comments in the configuration files and fix the spacing from using spaces to tabs. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/tegra20-colibri.dts4
-rw-r--r--arch/arm/dts/tegra30-colibri.dts2
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/dts/tegra20-colibri.dts b/arch/arm/dts/tegra20-colibri.dts
index 8eaac4f..f058d45 100644
--- a/arch/arm/dts/tegra20-colibri.dts
+++ b/arch/arm/dts/tegra20-colibri.dts
@@ -36,11 +36,13 @@
};
usb@c5004000 {
+ /* VBUS_LAN */
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
};
usb@c5008000 {
+ /* USBH_PEN */
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
};
@@ -82,8 +84,8 @@
sdhci@c8000600 {
status = "okay";
- cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
bus-width = <4>;
+ cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
};
lcd_panel: panel {
diff --git a/arch/arm/dts/tegra30-colibri.dts b/arch/arm/dts/tegra30-colibri.dts
index 36533dc..1da7260 100644
--- a/arch/arm/dts/tegra30-colibri.dts
+++ b/arch/arm/dts/tegra30-colibri.dts
@@ -82,9 +82,9 @@
/* EHCI instance 1: USB2_DP/N -> AX88772B */
usb@7d004000 {
status = "okay";
- phy_type = "utmi";
/* VBUS_LAN */
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
+ phy_type = "utmi";
};
/* EHCI instance 2: USB3_DP/N -> USBH_P/N */