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authorXu Ziyuan <xzy.xu@rock-chips.com>2016-09-05 09:39:58 +0800
committerSimon Glass <sjg@chromium.org>2016-10-01 18:35:01 -0600
commit2179a07c0c7d1a87ccf13b3f3124c107de7dab91 (patch)
tree4d28a3c57113654fdb1e705e9f067eafd57c2fb0 /arch
parent45b047e557bdcf68dc08e61cf207dd35b9ba8bbc (diff)
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rockchip: rk3288: sdram: fix DDR address range
The all current Rockchip SoCs supporting 4GB of ram have problems accessing the memory region 0xfe000000~0xff000000. Actually, some IP controller can't address to, so let's limit the available range. This patch fixes a bug which found in miniarm-rk3288-4GB board. The U-Boot was relocated to 0xfef72000, and .bss variants was also relocated, such as do_fat_read_at_block. Once eMMC controller transfer data to do_fat_read_at_block via DMA, DMAC can't access more than 0xfe000000. So that DMAC didn't work sane. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-rockchip/rk3288/sdram_rk3288.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
index cf9ef2e..8020e9c 100644
--- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
@@ -755,10 +755,11 @@ size_t sdram_size_mb(struct rk3288_pmu *pmu)
}
/*
- * we use the 0x00000000~0xfeffffff space since 0xff000000~0xffffffff
- * is SoC register space (i.e. reserved)
+ * we use the 0x00000000~0xfdffffff space since 0xff000000~0xffffffff
+ * is SoC register space (i.e. reserved), and 0xfe000000~0xfeffffff is
+ * inaccessible for some IP controller.
*/
- size_mb = min(size_mb, 0xff000000 >> 20);
+ size_mb = min(size_mb, 0xfe000000 >> 20);
return size_mb;
}