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| author | Bai Ping <ping.bai@nxp.com> | 2016-08-30 15:54:26 +0800 |
|---|---|---|
| committer | Bai Ping <ping.bai@nxp.com> | 2016-08-30 16:47:11 +0800 |
| commit | b2690f5cf54390999acb2f1f7b788bfd18fa11be (patch) | |
| tree | 8e0a665716ff3adb352f5bb66ccb69b69ff2daed /arch | |
| parent | 911fcf93bad8c0a595c350b92f107b626029559b (diff) | |
| download | u-boot-imx-b2690f5cf54390999acb2f1f7b788bfd18fa11be.zip u-boot-imx-b2690f5cf54390999acb2f1f7b788bfd18fa11be.tar.gz u-boot-imx-b2690f5cf54390999acb2f1f7b788bfd18fa11be.tar.bz2 | |
MLK-13140 ARM: imx: update REFTOP_VBGADJ according to fuse setting
On i.MX6ULL, according to the latest REFTOP_TRIM fuse define, we need
to set the REFTOP_VBGADJ bits in PMU_MISC0 register as below table:
'000" - set REFTOP_VBGADJ[2:0] to 3'b000
'001" - set REFTOP_VBGADJ[2:0] to 3'b001
'010" - set REFTOP_VBGADJ[2:0] to 3'b010
'011" - set REFTOP_VBGADJ[2:0] to 3'b011
'100" - set REFTOP_VBGADJ[2:0] to 3'b100
'101" - set REFTOP_VBGADJ[2:0] to 3'b101
'110" - set REFTOP_VBGADJ[2:0] to 3'b110
'111" - set REFTOP_VBGADJ[2:0] to 3'b111
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 9ecee77..424e869 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -349,11 +349,6 @@ static void init_bandgap(void) val >>= OCOTP_MEM0_REFTOP_TRIM_SHIFT; val &= 0x7; - if (val == 0) { - val = 6; - } else if (val == 6) { - val = 0; - } writel(val << BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ_SHIFT, &anatop->ana_misc0_set); } |