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| author | Simon Glass <sjg@chromium.org> | 2013-03-11 06:08:06 +0000 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2013-03-19 08:45:37 -0700 |
| commit | 1e566bc6dbcfc9f13909d5cb40dd74925bcdd579 (patch) | |
| tree | 225721f4a7cdf6703a4b0408b1e63be1c649cc6f /arch | |
| parent | 0c456cee952f3fa5ae6f5c42f960eeaa39140b62 (diff) | |
| download | u-boot-imx-1e566bc6dbcfc9f13909d5cb40dd74925bcdd579.zip u-boot-imx-1e566bc6dbcfc9f13909d5cb40dd74925bcdd579.tar.gz u-boot-imx-1e566bc6dbcfc9f13909d5cb40dd74925bcdd579.tar.bz2 | |
sf: Respect maximum SPI write size
Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions