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authorTom Rini <trini@konsulko.com>2015-08-05 14:12:37 -0400
committerTom Rini <trini@konsulko.com>2015-08-05 14:12:37 -0400
commit1a2728ae4faf12874173de156b8a7e66cfbbeae5 (patch)
tree9aba8e6c915b341df8ec6077d8ecb28f1eb32b0b /arch
parentdcc7dbc73169bb4e39f27c1d95bbf031ccfc1744 (diff)
parent12c7510f17ff29190e52336910e43a50c0d620a6 (diff)
downloadu-boot-imx-1a2728ae4faf12874173de156b8a7e66cfbbeae5.zip
u-boot-imx-1a2728ae4faf12874173de156b8a7e66cfbbeae5.tar.gz
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Merge git://git.denx.de/u-boot-x86
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/Kconfig10
-rw-r--r--arch/x86/Makefile2
-rw-r--r--arch/x86/config.mk47
-rw-r--r--arch/x86/cpu/Makefile7
-rw-r--r--arch/x86/cpu/baytrail/Kconfig2
-rw-r--r--arch/x86/cpu/baytrail/cpu.c2
-rw-r--r--arch/x86/cpu/baytrail/valleyview.c10
-rw-r--r--arch/x86/cpu/call32.S64
-rw-r--r--arch/x86/cpu/call64.S4
-rw-r--r--arch/x86/cpu/cpu.c23
-rw-r--r--arch/x86/cpu/efi/Makefile8
-rw-r--r--arch/x86/cpu/efi/efi.c42
-rw-r--r--arch/x86/cpu/efi/elf_ia32_efi.lds94
-rw-r--r--arch/x86/cpu/efi/elf_x86_64_efi.lds83
-rw-r--r--arch/x86/cpu/efi/sdram.c29
-rw-r--r--arch/x86/cpu/interrupts.c25
-rw-r--r--arch/x86/cpu/mp_init.c2
-rw-r--r--arch/x86/cpu/qemu/Makefile5
-rw-r--r--arch/x86/cpu/qemu/qemu.c2
-rw-r--r--arch/x86/cpu/start.S73
-rw-r--r--arch/x86/dts/Makefile4
-rw-r--r--arch/x86/dts/bayleybay.dts197
-rw-r--r--arch/x86/dts/efi.dts22
-rw-r--r--arch/x86/dts/microcode/m0230671117.dtsi4244
-rw-r--r--arch/x86/dts/qemu-x86_i440fx.dts7
-rw-r--r--arch/x86/dts/qemu-x86_q35.dts7
-rw-r--r--arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h3
-rw-r--r--arch/x86/include/asm/arch-efi/gpio.h10
-rw-r--r--arch/x86/include/asm/cpu.h27
-rw-r--r--arch/x86/include/asm/elf.h46
-rw-r--r--arch/x86/include/asm/fsp/fsp_hob.h59
-rw-r--r--arch/x86/include/asm/global_data.h16
-rw-r--r--arch/x86/include/asm/relocate.h1
-rw-r--r--arch/x86/include/asm/types.h5
-rw-r--r--arch/x86/lib/Makefile3
-rw-r--r--arch/x86/lib/asm-offsets.c1
-rw-r--r--arch/x86/lib/bootm.c7
-rw-r--r--arch/x86/lib/efi/Kconfig11
-rw-r--r--arch/x86/lib/efi/Makefile27
-rw-r--r--arch/x86/lib/efi/car.S10
-rw-r--r--arch/x86/lib/efi/crt0-efi-ia32.S52
-rw-r--r--arch/x86/lib/efi/crt0-efi-x86_64.S51
-rw-r--r--arch/x86/lib/efi/efi.c151
-rw-r--r--arch/x86/lib/efi/reloc_ia32.c72
-rw-r--r--arch/x86/lib/efi/reloc_x86_64.c66
-rw-r--r--arch/x86/lib/fsp/fsp_common.c2
-rw-r--r--arch/x86/lib/lpc-uclass.c2
-rw-r--r--arch/x86/lib/pch-uclass.c2
-rw-r--r--arch/x86/lib/relocate.c41
-rw-r--r--arch/x86/lib/tsc_timer.c8
50 files changed, 5552 insertions, 136 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e8968a7..01ed760 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -11,6 +11,9 @@ choice
config VENDOR_COREBOOT
bool "coreboot"
+config VENDOR_EFI
+ bool "efi"
+
config VENDOR_EMULATION
bool "emulation"
@@ -24,6 +27,7 @@ endchoice
# board-specific options below
source "board/coreboot/Kconfig"
+source "board/efi/Kconfig"
source "board/emulation/Kconfig"
source "board/google/Kconfig"
source "board/intel/Kconfig"
@@ -190,6 +194,7 @@ config X86_RAMTEST
config HAVE_FSP
bool "Add an Firmware Support Package binary"
+ depends on !EFI
help
Select this option to add an Firmware Support Package binary to
the resulting U-Boot image. It is a binary blob which U-Boot uses
@@ -305,6 +310,7 @@ menu "System tables"
config GENERATE_PIRQ_TABLE
bool "Generate a PIRQ table"
+ depends on !EFI
default n
help
Generate a PIRQ routing table for this board. The PIRQ routing table
@@ -315,6 +321,7 @@ config GENERATE_PIRQ_TABLE
config GENERATE_SFI_TABLE
bool "Generate a SFI (Simple Firmware Interface) table"
+ depends on !EFI
help
The Simple Firmware Interface (SFI) provides a lightweight method
for platform firmware to pass information to the operating system
@@ -329,6 +336,7 @@ config GENERATE_SFI_TABLE
config GENERATE_MP_TABLE
bool "Generate an MP (Multi-Processor) table"
+ depends on !EFI
default n
help
Generate an MP (Multi-Processor) table for this board. The MP table
@@ -379,4 +387,6 @@ config PCIE_ECAM_SIZE
so a default 0x10000000 size covers all of the 256 buses which is the
maximum number of PCI buses as defined by the PCI specification.
+source "arch/x86/lib/efi/Kconfig"
+
endmenu
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 36a6018..d104a49 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -2,7 +2,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
+ifeq ($(CONFIG_EFI_APP),)
head-y := arch/x86/cpu/start.o
+endif
ifeq ($(CONFIG_SPL_BUILD),y)
head-y += arch/x86/cpu/start16.o
head-y += arch/x86/cpu/resetvec.o
diff --git a/arch/x86/config.mk b/arch/x86/config.mk
index 999143e..d7addd8 100644
--- a/arch/x86/config.mk
+++ b/arch/x86/config.mk
@@ -8,19 +8,60 @@
CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000
PLATFORM_CPPFLAGS += -fno-strict-aliasing
-PLATFORM_CPPFLAGS += -mregparm=3
PLATFORM_CPPFLAGS += -fomit-frame-pointer
PF_CPPFLAGS_X86 := $(call cc-option, -fno-toplevel-reorder, \
$(call cc-option, -fno-unit-at-a-time)) \
$(call cc-option, -mpreferred-stack-boundary=2)
+
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_X86)
PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm
PLATFORM_CPPFLAGS += -march=i386 -m32
PLATFORM_RELFLAGS += -ffunction-sections -fvisibility=hidden
-PLATFORM_LDFLAGS += --emit-relocs -Bsymbolic -Bsymbolic-functions -m elf_i386
+PLATFORM_LDFLAGS += -Bsymbolic -Bsymbolic-functions -m elf_i386
-LDFLAGS_FINAL += --gc-sections -pie
LDFLAGS_FINAL += --wrap=__divdi3 --wrap=__udivdi3
LDFLAGS_FINAL += --wrap=__moddi3 --wrap=__umoddi3
+
+# This is used in the top-level Makefile which does not include
+# PLATFORM_LDFLAGS
+LDFLAGS_EFI_PAYLOAD := -Bsymbolic -Bsymbolic-functions -shared --no-undefined
+
+OBJCOPYFLAGS_EFI := -j .text -j .sdata -j .data -j .dynamic -j .dynsym \
+ -j .rel -j .rela -j .reloc
+
+CFLAGS_NON_EFI := -mregparm=3
+CFLAGS_EFI := -fpic -fshort-wchar
+
+ifeq ($(CONFIG_EFI_STUB_64BIT),)
+CFLAGS_EFI += $(call cc-option, -mno-red-zone)
+EFIARCH = ia32
+EFIPAYLOAD_BFDTARGET = elf32-i386
+else
+EFIARCH = x86_64
+EFIPAYLOAD_BFDTARGET = elf64-x86-64
+endif
+
+EFIPAYLOAD_BFDARCH = i386
+
+LDSCRIPT_EFI := $(srctree)/$(CPUDIR)/efi/elf_$(EFIARCH)_efi.lds
+EFISTUB := crt0-efi-$(EFIARCH).o reloc_$(EFIARCH).o
+OBJCOPYFLAGS_EFI += --target=efi-app-$(EFIARCH)
+
+CPPFLAGS_REMOVE_crt0-efi-$(EFIARCH).o += $(CFLAGS_NON_EFI)
+CPPFLAGS_crt0-efi-$(EFIARCH).o += $(CFLAGS_EFI)
+
+ifeq ($(CONFIG_EFI_APP),y)
+
+PLATFORM_CPPFLAGS += $(CFLAGS_EFI)
+LDFLAGS_FINAL += -znocombreloc -shared
+LDSCRIPT := $(LDSCRIPT_EFI)
+
+else
+
+PLATFORM_CPPFLAGS += $(CFLAGS_NON_EFI)
+PLATFORM_LDFLAGS += --emit-relocs
+LDFLAGS_FINAL += --gc-sections -pie
+
+endif
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 8a8e63e..e797925 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -12,8 +12,15 @@ extra-y = start.o
obj-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o
obj-y += interrupts.o cpu.o cpu_x86.o call64.o
+AFLAGS_REMOVE_call32.o := -mregparm=3 \
+ $(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32)
+AFLAGS_call32.o := -fpic -fshort-wchar
+
+extra-y += call32.o
+
obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
obj-$(CONFIG_SYS_COREBOOT) += coreboot/
+obj-$(CONFIG_EFI_APP) += efi/
obj-$(CONFIG_QEMU) += qemu/
obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/
obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
diff --git a/arch/x86/cpu/baytrail/Kconfig b/arch/x86/cpu/baytrail/Kconfig
index e86cc01..407feb2 100644
--- a/arch/x86/cpu/baytrail/Kconfig
+++ b/arch/x86/cpu/baytrail/Kconfig
@@ -6,4 +6,4 @@
config INTEL_BAYTRAIL
bool
- select HAVE_FSP
+ select HAVE_FSP if !EFI
diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c
index a011730..b1faf8c 100644
--- a/arch/x86/cpu/baytrail/cpu.c
+++ b/arch/x86/cpu/baytrail/cpu.c
@@ -45,6 +45,8 @@ static void set_max_freq(void)
static int cpu_x86_baytrail_probe(struct udevice *dev)
{
+ if (!ll_boot_init())
+ return 0;
debug("Init BayTrail core\n");
/*
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index 9915da5..610e9d9 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <mmc.h>
#include <pci_ids.h>
+#include <asm/irq.h>
#include <asm/post.h>
static struct pci_device_id mmc_supported[] = {
@@ -20,6 +21,7 @@ int cpu_mmc_init(bd_t *bis)
ARRAY_SIZE(mmc_supported));
}
+#ifndef CONFIG_EFI_APP
int arch_cpu_init(void)
{
int ret;
@@ -35,3 +37,11 @@ int arch_cpu_init(void)
return 0;
}
+
+int arch_misc_init(void)
+{
+ pirq_init();
+
+ return 0;
+}
+#endif
diff --git a/arch/x86/cpu/call32.S b/arch/x86/cpu/call32.S
new file mode 100644
index 0000000..c517e4a
--- /dev/null
+++ b/arch/x86/cpu/call32.S
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/global_data.h>
+#include <asm/msr-index.h>
+#include <asm/processor-flags.h>
+
+ /*
+ * rdi - 32-bit code segment selector
+ * rsi - target address
+ * rdx - table address (0 if none)
+ */
+.code64
+.globl cpu_call32
+cpu_call32:
+ cli
+
+ /* Save table pointer */
+ mov %edx, %ebx
+
+ /*
+ * Debugging option, this outputs characters to the console UART
+ * mov $0x3f8,%edx
+ * mov $'a',%al
+ * out %al,(%dx)
+ */
+
+ pushf
+ push %rdi /* 32-bit code segment */
+ lea compat(%rip), %rax
+ push %rax
+ .byte 0x48 /* REX prefix to force 64-bit far return */
+ retf
+.code32
+compat:
+ /*
+ * We are now in compatibility mode with a default operand size of
+ * 32 bits. First disable paging.
+ */
+ movl %cr0, %eax
+ andl $~X86_CR0_PG, %eax
+ movl %eax, %cr0
+
+ /* Invalidate TLB */
+ xorl %eax, %eax
+ movl %eax, %cr3
+
+ /* Disable Long mode in EFER (Extended Feature Enable Register) */
+ movl $MSR_EFER, %ecx
+ rdmsr
+ btr $_EFER_LME, %eax
+ wrmsr
+
+ /* Set up table pointer for _x86boot_start */
+ mov %ebx, %ecx
+
+ /* Jump to the required target */
+ pushl %edi /* 32-bit code segment */
+ pushl %esi /* 32-bit target address */
+ retf
diff --git a/arch/x86/cpu/call64.S b/arch/x86/cpu/call64.S
index 74dd5a8..08dc473 100644
--- a/arch/x86/cpu/call64.S
+++ b/arch/x86/cpu/call64.S
@@ -82,8 +82,8 @@ lret_target:
.data
gdt:
- .word gdt_end - gdt
- .long gdt
+ .word gdt_end - gdt - 1
+ .long gdt /* Fixed up by code above */
.word 0
.quad 0x0000000000000000 /* NULL descriptor */
.quad 0x00af9a000000ffff /* __KERNEL_CS */
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index b9134cf..129777c 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -330,13 +330,15 @@ int x86_cpu_init_f(void)
const u32 em_rst = ~X86_CR0_EM;
const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE;
- /* initialize FPU, reset EM, set MP and NE */
- asm ("fninit\n" \
- "movl %%cr0, %%eax\n" \
- "andl %0, %%eax\n" \
- "orl %1, %%eax\n" \
- "movl %%eax, %%cr0\n" \
- : : "i" (em_rst), "i" (mp_ne_set) : "eax");
+ if (ll_boot_init()) {
+ /* initialize FPU, reset EM, set MP and NE */
+ asm ("fninit\n" \
+ "movl %%cr0, %%eax\n" \
+ "andl %0, %%eax\n" \
+ "orl %1, %%eax\n" \
+ "movl %%eax, %%cr0\n" \
+ : : "i" (em_rst), "i" (mp_ne_set) : "eax");
+ }
/* identify CPU via cpuid and store the decoded info into gd->arch */
if (has_cpuid()) {
@@ -456,7 +458,7 @@ void x86_full_reset(void)
int dcache_status(void)
{
- return !(read_cr0() & 0x40000000);
+ return !(read_cr0() & X86_CR0_CD);
}
/* Define these functions to allow ehch-hcd to function */
@@ -712,5 +714,8 @@ __weak int x86_init_cpus(void)
int cpu_init_r(void)
{
- return x86_init_cpus();
+ if (ll_boot_init())
+ return x86_init_cpus();
+
+ return 0;
}
diff --git a/arch/x86/cpu/efi/Makefile b/arch/x86/cpu/efi/Makefile
new file mode 100644
index 0000000..e091637
--- /dev/null
+++ b/arch/x86/cpu/efi/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2015 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += efi.o
+obj-y += sdram.o
diff --git a/arch/x86/cpu/efi/efi.c b/arch/x86/cpu/efi/efi.c
new file mode 100644
index 0000000..75ba0d4
--- /dev/null
+++ b/arch/x86/cpu/efi/efi.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <netdev.h>
+
+int arch_cpu_init(void)
+{
+#ifdef CONFIG_SYS_X86_TSC_TIMER
+ timer_set_base(rdtsc());
+#endif
+
+ return 0;
+}
+
+int board_early_init_f(void)
+{
+ return 0;
+}
+
+int print_cpuinfo(void)
+{
+ return default_print_cpuinfo();
+}
+
+void board_final_cleanup(void)
+{
+}
+
+int misc_init_r(void)
+{
+ return 0;
+}
+
+int arch_misc_init(void)
+{
+ return 0;
+}
diff --git a/arch/x86/cpu/efi/elf_ia32_efi.lds b/arch/x86/cpu/efi/elf_ia32_efi.lds
new file mode 100644
index 0000000..cd3b0a9
--- /dev/null
+++ b/arch/x86/cpu/efi/elf_ia32_efi.lds
@@ -0,0 +1,94 @@
+/*
+ * U-Boot EFI linker script
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Modified from usr/lib32/elf_ia32_efi.lds in gnu-efi
+ */
+
+#include <config.h>
+
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+ENTRY(_start)
+SECTIONS
+{
+ image_base = .;
+ .hash : { *(.hash) } /* this MUST come first, EFI expects it */
+ . = ALIGN(4096);
+ .text :
+ {
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t.*)
+ }
+ . = ALIGN(4096);
+ .sdata :
+ {
+ *(.got.plt)
+ *(.got)
+ *(.srodata)
+ *(.sdata)
+ *(.sbss)
+ *(.scommon)
+ }
+ . = ALIGN(4096);
+ .data :
+ {
+ *(.rodata*)
+ *(.data)
+ *(.data1)
+ *(.data.*)
+ *(.sdata)
+ *(.got.plt)
+ *(.got)
+ /*
+ * the EFI loader doesn't seem to like a .bss section, so we
+ * stick it all into .data:
+ */
+ *(.sbss)
+ *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+
+ /* U-Boot lists and device tree */
+ . = ALIGN(8);
+ *(SORT(.u_boot_list*));
+ . = ALIGN(8);
+ *(.dtb*);
+ }
+
+ . = ALIGN(4096);
+ .dynamic : { *(.dynamic) }
+ . = ALIGN(4096);
+ .rel :
+ {
+ *(.rel.data)
+ *(.rel.data.*)
+ *(.rel.got)
+ *(.rel.stab)
+ *(.data.rel.ro.local)
+ *(.data.rel.local)
+ *(.data.rel.ro)
+ *(.data.rel*)
+ *(.rel.u_boot_list*)
+ }
+ . = ALIGN(4096);
+ .reloc : /* This is the PECOFF .reloc section! */
+ {
+ *(.reloc)
+ }
+ . = ALIGN(4096);
+ .dynsym : { *(.dynsym) }
+ . = ALIGN(4096);
+ .dynstr : { *(.dynstr) }
+ . = ALIGN(4096);
+ /DISCARD/ :
+ {
+ *(.rel.reloc)
+ *(.eh_frame)
+ *(.note.GNU-stack)
+ }
+ .comment 0 : { *(.comment) }
+}
diff --git a/arch/x86/cpu/efi/elf_x86_64_efi.lds b/arch/x86/cpu/efi/elf_x86_64_efi.lds
new file mode 100644
index 0000000..9d9f057
--- /dev/null
+++ b/arch/x86/cpu/efi/elf_x86_64_efi.lds
@@ -0,0 +1,83 @@
+/*
+ * U-Boot EFI linker script
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Modified from usr/lib32/elf_x86_64_efi.lds in gnu-efi
+ */
+
+#include <config.h>
+
+OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64")
+OUTPUT_ARCH(i386:x86-64)
+ENTRY(_start)
+SECTIONS
+{
+ image_base = .;
+ .hash : { *(.hash) } /* this MUST come first, EFI expects it */
+ . = ALIGN(4096);
+ .eh_frame : {
+ *(.eh_frame)
+ }
+
+ . = ALIGN(4096);
+
+ .text : {
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t.*)
+ }
+
+ . = ALIGN(4096);
+
+ .reloc : {
+ *(.reloc)
+ }
+
+ . = ALIGN(4096);
+
+ .data : {
+ *(.rodata*)
+ *(.got.plt)
+ *(.got)
+ *(.data*)
+ *(.sdata)
+ /* the EFI loader doesn't seem to like a .bss section, so we stick
+ * it all into .data: */
+ *(.sbss)
+ *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ *(.rel.local)
+
+ /* U-Boot lists and device tree */
+ . = ALIGN(8);
+ *(SORT(.u_boot_list*));
+ . = ALIGN(8);
+ *(.dtb*);
+ }
+
+ . = ALIGN(4096);
+ .dynamic : { *(.dynamic) }
+ . = ALIGN(4096);
+
+ .rela : {
+ *(.rela.data*)
+ *(.rela.got)
+ *(.rela.stab)
+ }
+
+ . = ALIGN(4096);
+ .dynsym : { *(.dynsym) }
+ . = ALIGN(4096);
+ .dynstr : { *(.dynstr) }
+ . = ALIGN(4096);
+ .ignored.reloc : {
+ *(.rela.reloc)
+ *(.eh_frame)
+ *(.note.GNU-stack)
+ }
+
+ .comment 0 : { *(.comment) }
+}
diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c
new file mode 100644
index 0000000..5159944
--- /dev/null
+++ b/arch/x86/cpu/efi/sdram.c
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <efi.h>
+#include <asm/u-boot-x86.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ return (ulong)efi_get_ram_base() + gd->ram_size;
+}
+
+int dram_init(void)
+{
+ /* gd->ram_size is set as part of EFI init */
+
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = efi_get_ram_base();
+ gd->bd->bi_dram[0].size = CONFIG_EFI_RAM_SIZE;
+}
diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
index 853c82f..9217307 100644
--- a/arch/x86/cpu/interrupts.c
+++ b/arch/x86/cpu/interrupts.c
@@ -19,6 +19,7 @@
#include <asm/processor-flags.h>
#include <linux/compiler.h>
#include <asm/msr.h>
+#include <asm/processor.h>
#include <asm/u-boot-x86.h>
#include <asm/i8259.h>
@@ -46,7 +47,7 @@ static char *exceptions[] = {
"Invalid TSS",
"Segment Not Present",
"Stack Segment Fault",
- "Gerneral Protection",
+ "General Protection",
"Page Fault",
"Reserved",
"x87 FPU Floating-Point Error",
@@ -165,7 +166,6 @@ struct idt_entry {
struct desc_ptr {
unsigned short size;
unsigned long address;
- unsigned short segment;
} __packed;
struct idt_entry idt[256] __aligned(16);
@@ -202,14 +202,13 @@ int cpu_init_interrupts(void)
for (i = 0; i < 256; i++) {
idt[i].access = 0x8e;
idt[i].res = 0;
- idt[i].selector = 0x10;
+ idt[i].selector = X86_GDT_ENTRY_32BIT_CS * X86_GDT_ENTRY_SIZE;
set_vector(i, irq_entry);
irq_entry += irq_entry_size;
}
- idt_ptr.size = 256 * 8;
+ idt_ptr.size = 256 * 8 - 1;
idt_ptr.address = (unsigned long) idt;
- idt_ptr.segment = 0x18;
load_idt(&idt_ptr);
@@ -243,6 +242,11 @@ int disable_interrupts(void)
int interrupt_init(void)
{
+ /*
+ * When running as an EFI application we are not in control of
+ * interrupts and should leave them alone.
+ */
+#ifndef CONFIG_EFI_APP
/* Just in case... */
disable_interrupts();
@@ -254,8 +258,15 @@ int interrupt_init(void)
/* Initialize core interrupt and exception functionality of CPU */
cpu_init_interrupts();
- /* It is now safe to enable interrupts */
- enable_interrupts();
+ /*
+ * It is now safe to enable interrupts.
+ *
+ * TODO(sjg@chromium.org): But we don't handle these correctly when
+ * booted from EFI.
+ */
+ if (ll_boot_init())
+ enable_interrupts();
+#endif
return 0;
}
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index e686b28..3294a50 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -24,6 +24,8 @@
#include <dm/uclass-internal.h>
#include <linux/linkage.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* Total CPUs include BSP */
static int num_cpus;
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index be79723..9a66b16 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -4,5 +4,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += car.o dram.o qemu.o
+ifndef CONFIG_EFI_STUB
+obj-y += car.o dram.o
+endif
+obj-y += qemu.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 930d2b6..64634a9 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -25,11 +25,13 @@ int arch_cpu_init(void)
return 0;
}
+#ifndef CONFIG_EFI_STUB
int print_cpuinfo(void)
{
post_code(POST_CPU_INFO);
return default_print_cpuinfo();
}
+#endif
void reset_cpu(ulong addr)
{
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 00e585e..e5c1733 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -25,11 +25,11 @@
.globl _x86boot_start
_x86boot_start:
/*
- * This is the fail safe 32-bit bootstrap entry point. The
- * following code is not executed from a cold-reset (actually, a
- * lot of it is, but from real-mode after cold reset. It is
- * repeated here to put the board into a state as close to cold
- * reset as necessary)
+ * This is the fail-safe 32-bit bootstrap entry point.
+ *
+ * This code is used when booting from another boot loader like
+ * coreboot or EFI. So we repeat some of the same init found in
+ * start16.
*/
cli
cld
@@ -41,19 +41,34 @@ _x86boot_start:
wbinvd
/* Tell 32-bit code it is being entered from an in-RAM copy */
- movw $GD_FLG_WARM_BOOT, %bx
+ movl $GD_FLG_WARM_BOOT, %ebx
+
+ /*
+ * Zero the BIST (Built-In Self Test) value since we don't have it.
+ * It must be 0 or the previous loader would have reported an error.
+ */
+ movl $0, %ebp
+
jmp 1f
+
+ /* Add a way for tools to discover the _start entry point */
+ .align 4
+ .long 0x12345678
_start:
/*
- * This is the 32-bit cold-reset entry point. Initialize %bx to 0
- * in case we're preceeded by some sort of boot stub.
+ * This is the 32-bit cold-reset entry point, coming from start16.
+ * Set %ebx to GD_FLG_COLD_BOOT to indicate this.
*/
- movw $GD_FLG_COLD_BOOT, %bx
-1:
+ movl $GD_FLG_COLD_BOOT, %ebx
+
/* Save BIST */
movl %eax, %ebp
+1:
+
+ /* Save table pointer */
+ movl %ecx, %esi
- /* Load the segement registes to match the gdt loaded in start16.S */
+ /* Load the segement registers to match the GDT loaded in start16.S */
movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
movw %ax, %fs
movw %ax, %ds
@@ -64,7 +79,11 @@ _start:
/* Clear the interrupt vectors */
lidt blank_idt_ptr
- /* Early platform init (setup gpio, etc ) */
+ /*
+ * Critical early platform init - generally not used, we prefer init
+ * to happen later when we have a console, in case something goes
+ * wrong.
+ */
jmp early_board_init
.globl early_board_init_ret
early_board_init_ret:
@@ -79,7 +98,7 @@ car_init_ret:
* We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
* or fully initialised SDRAM - we really don't care which)
* starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
- * and early malloc area. The MRC requires some space at the top.
+ * and early malloc() area. The MRC requires some space at the top.
*
* Stack grows down from top of CAR. We have:
*
@@ -97,7 +116,7 @@ car_init_ret:
#endif
#else
/*
- * When we get here after car_init, esp points to a temporary stack
+ * When we get here after car_init(), esp points to a temporary stack
* and esi holds the HOB list address returned by the FSP.
*/
#endif
@@ -125,7 +144,13 @@ car_init_ret:
movl %esi, (%edx)
skip_hob:
+#else
+ /* Store table pointer */
+ movl %esp, %edx
+ addl $GD_TABLE, %edx
+ movl %esi, (%edx)
#endif
+
/* Setup first parameter to setup_gdt, pointer to global_data */
movl %esp, %eax
@@ -137,17 +162,18 @@ skip_hob:
movl %esp, %ecx
#if defined(CONFIG_SYS_MALLOC_F_LEN)
+ /* Set up the pre-relocation malloc pool */
subl $CONFIG_SYS_MALLOC_F_LEN, %esp
movl %eax, %edx
addl $GD_MALLOC_BASE, %edx
movl %esp, (%edx)
#endif
- /* Store BIST */
+ /* Store BIST into global_data */
movl %eax, %edx
addl $GD_BIST, %edx
movl %ebp, (%edx)
- /* Set second parameter to setup_gdt */
+ /* Set second parameter to setup_gdt() */
movl %ecx, %edx
/* Setup global descriptor table so gd->xyz works */
@@ -157,7 +183,7 @@ skip_hob:
post_code(POST_START_DONE)
xorl %eax, %eax
- /* Enter, U-boot! */
+ /* Enter, U-Boot! */
call board_init_f
/* indicate (lack of) progress */
@@ -184,13 +210,13 @@ board_init_f_r_trampoline:
/* Align global data to 16-byte boundary */
andl $0xfffffff0, %esp
- /* Setup first parameter to memcpy (and setup_gdt) */
+ /* Setup first parameter to memcpy() and setup_gdt() */
movl %esp, %eax
- /* Setup second parameter to memcpy */
+ /* Setup second parameter to memcpy() */
fs movl 0, %edx
- /* Set third parameter to memcpy */
+ /* Set third parameter to memcpy() */
movl $GENERATED_GBL_DATA_SIZE, %ecx
/* Copy global data from CAR to SDRAM stack */
@@ -202,7 +228,7 @@ board_init_f_r_trampoline:
/* Align global descriptor table to 16-byte boundary */
andl $0xfffffff0, %esp
- /* Set second parameter to setup_gdt */
+ /* Set second parameter to setup_gdt() */
movl %esp, %edx
/* Setup global descriptor table so gd->xyz works */
@@ -216,7 +242,7 @@ board_init_f_r_trampoline:
call car_uninit
1:
- /* Re-enter U-Boot by calling board_init_f_r */
+ /* Re-enter U-Boot by calling board_init_f_r() */
call board_init_f_r
die:
@@ -230,9 +256,10 @@ blank_idt_ptr:
.p2align 2 /* force 4-byte alignment */
+ /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
multiboot_header:
/* magic */
- .long 0x1BADB002
+ .long 0x1badb002
/* flags */
.long (1 << 16)
/* checksum */
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index f86514c..71595c7 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -1,6 +1,8 @@
-dtb-y += chromebook_link.dtb \
+dtb-y += bayleybay.dtb \
+ chromebook_link.dtb \
chromebox_panther.dtb \
crownbay.dtb \
+ efi.dtb \
galileo.dtb \
minnowmax.dtb \
qemu-x86_i440fx.dtb \
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
new file mode 100644
index 0000000..9f8fa70
--- /dev/null
+++ b/arch/x86/dts/bayleybay.dts
@@ -0,0 +1,197 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/x86-gpio.h>
+#include <dt-bindings/interrupt-router/intel-irq.h>
+
+/include/ "skeleton.dtsi"
+/include/ "serial.dtsi"
+/include/ "rtc.dtsi"
+
+/ {
+ model = "Intel Bayley Bay";
+ compatible = "intel,bayleybay", "intel,baytrail";
+
+ aliases {
+ serial0 = &serial;
+ spi0 = "/spi";
+ };
+
+ config {
+ silent_console = <0>;
+ };
+
+ chosen {
+ stdout-path = "/serial";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "intel,baytrail-cpu";
+ reg = <0>;
+ intel,apic-id = <0>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "intel,baytrail-cpu";
+ reg = <1>;
+ intel,apic-id = <2>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "intel,baytrail-cpu";
+ reg = <2>;
+ intel,apic-id = <4>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "intel,baytrail-cpu";
+ reg = <3>;
+ intel,apic-id = <6>;
+ };
+ };
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ich-spi";
+ spi-flash@0 {
+ reg = <0>;
+ compatible = "winbond,w25q64dw", "spi-flash";
+ memory-map = <0xff800000 0x00800000>;
+ };
+ };
+
+ gpioa {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0 0x20>;
+ bank-name = "A";
+ };
+
+ gpiob {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x20 0x20>;
+ bank-name = "B";
+ };
+
+ gpioc {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x40 0x20>;
+ bank-name = "C";
+ };
+
+ gpiod {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x60 0x20>;
+ bank-name = "D";
+ };
+
+ gpioe {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0x80 0x20>;
+ bank-name = "E";
+ };
+
+ gpiof {
+ compatible = "intel,ich6-gpio";
+ u-boot,dm-pre-reloc;
+ reg = <0xA0 0x20>;
+ bank-name = "F";
+ };
+
+ pci {
+ compatible = "pci-x86";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ u-boot,dm-pre-reloc;
+ ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
+ 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
+ 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
+
+ irq-router@1f,0 {
+ reg = <0x0000f800 0 0 0 0>;
+ compatible = "intel,irq-router";
+ intel,pirq-config = "ibase";
+ intel,ibase-offset = <0x50>;
+ intel,pirq-link = <8 8>;
+ intel,pirq-mask = <0xdee0>;
+ intel,pirq-routing = <
+ /* BayTrail PCI devices */
+ PCI_BDF(0, 2, 0) INTA PIRQA
+ PCI_BDF(0, 3, 0) INTA PIRQA
+ PCI_BDF(0, 16, 0) INTA PIRQA
+ PCI_BDF(0, 17, 0) INTA PIRQA
+ PCI_BDF(0, 18, 0) INTA PIRQA
+ PCI_BDF(0, 19, 0) INTA PIRQA
+ PCI_BDF(0, 20, 0) INTA PIRQA
+ PCI_BDF(0, 21, 0) INTA PIRQA
+ PCI_BDF(0, 22, 0) INTA PIRQA
+ PCI_BDF(0, 23, 0) INTA PIRQA
+ PCI_BDF(0, 24, 0) INTA PIRQA
+ PCI_BDF(0, 24, 1) INTC PIRQC
+ PCI_BDF(0, 24, 2) INTD PIRQD
+ PCI_BDF(0, 24, 3) INTB PIRQB
+ PCI_BDF(0, 24, 4) INTA PIRQA
+ PCI_BDF(0, 24, 5) INTC PIRQC
+ PCI_BDF(0, 24, 6) INTD PIRQD
+ PCI_BDF(0, 24, 7) INTB PIRQB
+ PCI_BDF(0, 26, 0) INTA PIRQA
+ PCI_BDF(0, 27, 0) INTA PIRQA
+ PCI_BDF(0, 28, 0) INTA PIRQA
+ PCI_BDF(0, 28, 1) INTB PIRQB
+ PCI_BDF(0, 28, 2) INTC PIRQC
+ PCI_BDF(0, 28, 3) INTD PIRQD
+ PCI_BDF(0, 29, 0) INTA PIRQA
+ PCI_BDF(0, 30, 0) INTA PIRQA
+ PCI_BDF(0, 30, 1) INTD PIRQD
+ PCI_BDF(0, 30, 2) INTB PIRQB
+ PCI_BDF(0, 30, 3) INTC PIRQC
+ PCI_BDF(0, 30, 4) INTD PIRQD
+ PCI_BDF(0, 30, 5) INTB PIRQB
+ PCI_BDF(0, 31, 3) INTB PIRQB
+
+ /* PCIe root ports downstream interrupts */
+ PCI_BDF(1, 0, 0) INTA PIRQA
+ PCI_BDF(1, 0, 0) INTB PIRQB
+ PCI_BDF(1, 0, 0) INTC PIRQC
+ PCI_BDF(1, 0, 0) INTD PIRQD
+ PCI_BDF(2, 0, 0) INTA PIRQB
+ PCI_BDF(2, 0, 0) INTB PIRQC
+ PCI_BDF(2, 0, 0) INTC PIRQD
+ PCI_BDF(2, 0, 0) INTD PIRQA
+ PCI_BDF(3, 0, 0) INTA PIRQC
+ PCI_BDF(3, 0, 0) INTB PIRQD
+ PCI_BDF(3, 0, 0) INTC PIRQA
+ PCI_BDF(3, 0, 0) INTD PIRQB
+ PCI_BDF(4, 0, 0) INTA PIRQD
+ PCI_BDF(4, 0, 0) INTB PIRQA
+ PCI_BDF(4, 0, 0) INTC PIRQB
+ PCI_BDF(4, 0, 0) INTD PIRQC
+ >;
+ };
+ };
+
+ microcode {
+ update@0 {
+#include "microcode/m0230671117.dtsi"
+ };
+ };
+
+};
diff --git a/arch/x86/dts/efi.dts b/arch/x86/dts/efi.dts
new file mode 100644
index 0000000..1f50428
--- /dev/null
+++ b/arch/x86/dts/efi.dts
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "EFI";
+ compatible = "efi,app";
+
+ chosen {
+ stdout-path = &serial;
+ };
+
+ serial: serial {
+ compatible = "efi,uart";
+ };
+};
diff --git a/arch/x86/dts/microcode/m0230671117.dtsi b/arch/x86/dts/microcode/m0230671117.dtsi
new file mode 100644
index 0000000..439e84a
--- /dev/null
+++ b/arch/x86/dts/microcode/m0230671117.dtsi
@@ -0,0 +1,4244 @@
+/*
+ * ---
+ * This is a device tree fragment. Use #include to add these properties to a
+ * node.
+ *
+ * Date:
+ */
+
+compatible = "intel,microcode";
+intel,header-version = <1>;
+intel,update-revision = <0x117>;
+intel,date-code = <0x4102013>;
+intel,processor-signature = <0x30671>;
+intel,checksum = <0x2abfd907>;
+intel,loader-revision = <1>;
+intel,processor-flags = <0x2>;
+
+/* The first 48-bytes are the public header which repeats the above data */
+data = <
+ 0x01000000 0x17010000 0x13201004 0x71060300
+ 0x07d9bf2a 0x01000000 0x02000000 0xd0070100
+ 0x00080100 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xa1000000 0x01000200 0x17010000
+ 0x00000000 0x00000000 0x09041320 0x41410000
+ 0x01000000 0x71060300 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xf4410000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x66cf0793 0x27bf71f6 0x80b10062 0x8ecb5c66
+ 0x158f5c1e 0xea343126 0xc3f7f3a2 0xe4863e94
+ 0xdb666815 0x5a17bfc4 0x4fca009d 0x099ae8b3
+ 0x198e2c7d 0x7c665bbf 0xc07a1a7a 0x7dbcee26
+ 0x867296b2 0xc885b6ce 0xe602baff 0x68544b14
+ 0xc928c400 0x3add156d 0x531946f9 0x92a03216
+ 0xda352322 0xd967ee1f 0x3c5170a7 0xf6de834e
+ 0x5a2ed8b3 0x9fb8f050 0x450de17f 0xfd5ef070
+ 0x4954575f 0xa3a071ab 0xb56e2afb 0xe2b48302
+ 0x6655a958 0x57c9a438 0x1b2f688a 0x09309bc4
+ 0x0be95612 0x529c1633 0xc48515d9 0x29eb78df
+ 0x9933409f 0xda58dea9 0x58c805fd 0xbc110f5a
+ 0x40780ec0 0x6ad59bb3 0xc7387fb8 0x591c1490
+ 0xf9335932 0x32130e0b 0xef4b3c96 0xacd903f2
+ 0x5b362539 0xe7f85529 0xcb17c41f 0xe7e440d8
+ 0xfaf7e925 0x969b76fb 0x5edab8c7 0xf00012e8
+ 0x121c2971 0xe5b18959 0xadfd07c0 0x1f09c9d7
+ 0x9781006a 0x39550073 0x6c438b6d 0x436f60bc
+ 0x11000000 0xe652e618 0x13c8666a 0x3b61e025
+ 0xa07f9120 0x29d9f7bb 0x710dcff6 0x1e3c82e1
+ 0x5757a634 0xafdc75ca 0xebd0b2cf 0x61f3ef48
+ 0x1bc78714 0x1c5217e5 0x62cde08c 0x4b9de061
+ 0x99425c27 0x3b8bbbcb 0xad68d252 0xdf3f7a9b
+ 0x4f20f8d4 0x295b2c1b 0xff10528f 0x8cc5052e
+ 0xdc9a1a30 0xbc2c6da4 0xc73c4031 0x767f5d70
+ 0x7105731c 0xba15b967 0x1cc9d3cf 0x0fc90a14
+ 0x5ca6cf86 0x34bbf254 0x9a527776 0x993e4707
+ 0x20653854 0xf23908e4 0x28b4c751 0xea9ec331
+ 0x296f176f 0x7ae60609 0xd73ae7a9 0xa749cf4a
+ 0xe6356939 0x5f10991d 0xf008b336 0x6bea7d12
+ 0xcb4c8f5c 0x90066bbc 0x04d56a77 0x05707157
+ 0x706cf097 0xd3bf95e4 0x281e9765 0x85aba829
+ 0x709f6dda 0xf91c80f1 0x20ae30b0 0xd72b63a9
+ 0x9dee5635 0x9a75be10 0xb8e4493e 0x68cf8302
+ 0xc9f3dba0 0x7d8d2d34 0x7c1ff523 0x7bb2f6ca
+ 0x6e3bcc24 0x06dfd137 0xf8ad42a5 0x5f43fb38
+ 0x4f6ef5c2 0x6aaf58fe 0xf31c1d4c 0x6cde5863
+ 0x346344a7 0xe8c7a056 0x5a38b9ef 0xf756b3b5
+ 0xe82d606a 0x7aad9c2d 0xee1bb194 0x50e748b6
+ 0x23989423 0xea008e2a 0xeabe64df 0x80e38649
+ 0x72fab067 0x5cbd907e 0xb3b45ecf 0x0915aefb
+ 0xf607d22e 0x68eea13b 0xcbe6eb4f 0xe7eed298
+ 0xc55ddcb5 0x6c7fd23a 0x6b7dd237 0x93735913
+ 0x3f1cd52b 0x45dc23d4 0x650a836e 0x8e4bafbc
+ 0x9602cbe4 0x347b18c2 0xb9f8dbc3 0xe792d712
+ 0xb435c211 0x71755e7e 0x738f7f0b 0x8697ce7c
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+ 0xc35b2ead 0xb1d36910 0x7e730284 0xbc752ed0
+ 0x1c089712 0x47b97c41 0xb5ff6990 0xecc0ad6a
+ 0x156a722d 0x1b19d460 0x5f62a0d7 0x0e9af8cb
+ 0xb4d9e908 0x0f2f1f2c 0x2579d59c 0x158cf00a
+ 0x1f8d0d95 0xeed21aa9 0xfd32a24a 0x67ca6a87
+ 0x16158824 0xdefd3a77 0x7e959fa9 0xa0ad2ef8
+ 0x043dc799 0x1af58242 0x6626121f 0x6952d127
+ 0xca7359da 0xd983f144 0x64234ebf 0x549e9d6a
+ 0x86c878da 0x1949a6ab 0x204735bd 0x9d1cccce
+ 0xbb155530 0x04599b33 0xe77c65aa 0x188bc6ae
+ 0x7a5f9e0c 0xe54447c4 0xc6117c29 0x66ab15d2
+ 0xcec48c6c 0xfccd374a 0x11299889 0x78b3f739
+ 0x62e9cd7f 0x080b9c34 0x3649fe49 0xba4a79e9
+ 0x1506f40b 0xaab7ffca 0xeca09b9a 0xe06c5857
+ 0x7278e73e 0x84c5ec07 0x75e9b3e3 0x30d12090
+ 0xdc55f4be 0xae1abf96 0x587f37ee 0x7435c374
+ 0xa54e1fd6 0x3053f495 0x1b529b06 0xa85ee2d3
+ 0x1cd31383 0x65a0b842 0xb3a6da29 0x652ab73b
+ 0x180e84fb 0x23da2a91 0xa5ce847e 0x8fa06e65
+ 0xb3a289e8 0xad5cec7e 0xf64d80c7 0x61478d3d
+ 0x84db47ef 0xf585a73e 0xcb375c3b 0x8e3a3cbe
+ 0x624b7c29 0x9a62fe29 0x402d5b03 0x28bfdfd6
+ 0x317c872b 0x75393f25 0x925c6574 0x8f0f1cf1
+ 0x14904e0f 0x4a92936f 0xb4c285bb 0xe1f18562
+ 0x3cbfd5ea 0x055c6d21 0xa01bf3a0 0xf49838d1
+ 0xddb029a9 0xee2e19eb 0x8868f661 0x5e0293be
+ 0x87b452c4 0xd9f2cae0 0x9f09805d 0xc27a8d29
+ 0x46e6c80f 0x0746ea1b 0x766588fe 0x7083c5ef
+ 0xb26c80b4 0xb80a9870 0x8965bf44 0x831141bc
+ 0x983f6dfd 0x4aea746d 0xb6a6868a 0xd5d3ff7f
+ 0x4d47d04c 0x0578acdf 0x75d364e1 0x82458818
+ 0xd69241b2 0xc017c8b5 0xc57f1424 0xcc0ce6e7
+ 0xda776779 0xb17c4559 0x818906e1 0xb3a456e0
+ 0x013a920e 0x9ab92a32 0xfae89bca 0x95d3bcdd
+ 0x2a062819 0x1eaaf582 0xbee69c95 0x78c136c6
+ 0xcb344597 0x32282e9e 0x75a1292f 0x2f44e2a4
+ 0x2c063975 0x189a5bbe 0x409fe732 0x7b8c86df
+ 0x64806b9d 0x80492807 0xa6ea51dd 0x0ed1c939
+ 0x19a169d7 0xc0d5f9ef 0x4975fe61 0x373b3081
+ 0x4f9c30e5 0x09050af4 0x87823aff 0x8180cd1b
+ 0xf257959d 0xf7f923ad 0xdc723bcc 0xd208c4d2
+ 0xcbf899f0 0xba6f3637 0xd5971aa8 0xfef92a9b
+ 0x3eb21c5f 0xfe49dd03 0xfa56c184 0x833509ac
+ 0x390d868a 0x2a719374 0x8e0b2f31 0xa03601fa
+ 0x57716451 0x3e7985bc 0x2b209209 0xc328d7f0
+ 0xb66f63a1 0xcecd4afe 0xdd25db81 0x828fb153
+ 0xedcc0634 0xc50371e9 0x26befe0f 0xd27e91a6
+ 0x65d13c7f 0xbaa9228b 0x5cf84d0d 0xd23113ed
+ 0xa9c49c35 0xb5f56083 0xcb62eda2 0x6beb244b
+ 0x2ed6fe75 0x7d1b6d3a 0xbfd3a154 0x6922d045
+ 0x7f5e16e7 0x54ae7dcd 0xf6207e7b 0x24ea0306
+ 0x0de191c9 0xc17533de 0x62863b55 0x4eda7343
+ 0xf619a868 0x1c10dfdf 0xd18fa204 0x5e54bf57
+ 0x85b86529 0xa78d8acc 0x68c1bd65 0x36db193e
+ 0xfad25f35 0xa8782cd4 0x642d36f7 0x7589edfa
+ 0xfbb5a9c5 0xece7b11a 0x3d4fdacd 0xf91cb430
+ 0x760f1353 0x88ca281d 0x8e015980 0x4ead0d20
+ 0xf49902a2 0x3779a778 0x95b7f01c 0xd93d19f4
+ 0x6e35ed1f 0x9502b095 0xfa1eda17 0x51958a6f
+ 0x738086fe 0x69614027 0x757670d5 0xe39a0823
+ 0x1678be8f 0xaba262d3 0xe3630a66 0x203c4cfe
+ 0xd6f20b31 0x5a4d2cd0 0x87807db4 0x03aab12a
+ 0x7cd38212 0x3d2fa8d2 0x727897c2 0x63f915aa
+ 0xc62647cc 0x24a4661b 0x4cb48c7a 0x0236a44d
+ 0x8010b995 0xfc5d34b4 0x3e27266e 0x0599f4f3
+ 0x6723916f 0x8d05b41b 0x1579a658 0x5857ad06
+ 0xf31cb1e4 0xe3ec3d22 0xed5e6614 0x248813df
+ 0x4ba7f160 0xe6aae07e 0x573b9725 0x2d5958fc
+ 0xd4fcc070 0xbff5051b 0x1d18493d 0xeb7498c0
+ 0x591c24cb 0xef5b7d5b 0x1f09ecba 0x669f0e5b
+ 0x6ea31dae 0x086a6619 0xbd9828e6 0x4deec094
+ 0xe82fd4a5 0x9d76681d 0x30c52de7 0x2246d260
+ 0x2d97fe50 0x5e54cfde 0xe0dbf9f8 0x05875177
+ 0x126bae9d 0x3871b4a5 0x70bf3fbf 0x04dbcfa1
+ 0x3ca4b296 0xebfaaaf9 0x5c9c06cd 0x106d81d6
+ 0xc1566322 0x55debd41 0x70898db7 0x57a59e02
+ 0xb53753f0 0xdc358da0 0x1c28315b 0xc10425da
+ 0x0c8304d5 0xf308b06a 0xee890456 0x5ff1ab50
+ 0xa54fb4c2 0x2c3e354d 0x4585c47f 0xbcf4c8f6
+ 0x81e775d5 0x5458933f 0x91b2d4cd 0x29140191
+ 0x8eb806c4 0x172e70c9 0x423a6661 0xcbf1413e
+ 0x0752f409 0x95420ffa 0xa46a0775 0x9f4c506d
+ 0xeaa0104b 0x73bc45ac 0xecbb267e 0x303cc2b1
+ 0x5c3d5fc3 0xca2f4657 0xa077571e 0x212c5842
+ 0xa719d011 0x8086b1b9 0x94a7566f 0x7322cf8b
+ 0x8642864f 0x7b49b221 0xbe3f32cc 0x7d4299cc
+ 0x889f9730 0x1f64fef1 0x0aa5fe78 0x97c5f71e
+ 0x2bc152de 0x9e322f49 0x71c2f971 0x64c964b0
+ 0x7dc99f56 0x8142a95d 0x8ccc1b3a 0xc25a6d26
+ 0xe55af85e 0xf4a30836 0xcca268b8 0x480b365a
+ 0xe7370885 0x3e01dfe2 0xa96c8012 0x55266fa5
+ 0x7cdd0b3a 0xe2e81e44 0xde9f3dfa 0xaa4169f4
+ 0xcfe050d1 0xe8cd8db1 0x130c7613 0x766c84b2
+ 0x11389d0d 0xb5381e93 0xfdd60cee 0xe0a6406f
+ 0x0cd541f4 0x037a0313 0x61830990 0x01938dcb
+ 0x451732d0 0x52e8d298 0xfd2b4bb2 0x3b773ed8
+ 0x579a4faa 0x6f4729aa 0xbe0a14a2 0xf6b0a98f
+ 0x3dc4cbff 0x5d708522 0x5a338e30 0xb09dd87d
+ 0x5236692a 0x44a75471 0x9017ef38 0x51c7ebfb
+ 0xa5e2c8c1 0xc54374b2 0x53faf90c 0xe0c7739c
+ 0x7e064238 0x24679b02 0x02e6e186 0x4edfef87
+ 0x9da9cd18 0xd8725b66 0xf608ec96 0x9e9dc091
+ 0x1f810f97 0xecc8cef7 0x8f8a43e2 0x204a30bf
+ 0x94339595 0xa61610d4 0x13fad76f 0xded761d3
+ 0x16fbb3e1 0xec00076f 0x6c674e6f 0x203e4734
+ 0x1b81be27 0xee803a89 0x2e054bdd 0x0ff3f125
+ 0xa48e650d 0x7896b400 0xefe1a527 0x5b0deaea
+ 0x9eca85f3 0x6f2c121b 0x51d63bfb 0xf1384bd1
+ 0x1c3fc01b 0xf72259b4 0xdb339714 0xa331d495
+ 0x15bd7c51 0xab693bf3 0xde0f7743 0xd3dd3acf
+ 0x8c755ac1 0x67ebc6c0 0xaa3404d1 0x006a6b45
+ 0x9e3d255d 0x20c4b946 0x3fd24a1f 0x41ed7231
+ 0x59f2bb05 0x3ad0fb24 0xb6f610a8 0x9a254d64
+ 0x0d5094b7 0xe01beae3 0x98a56a78 0x26c2da3b
+ 0xba4fd221 0xbe0f8666 0x61146fe5 0x1278a21e
+ 0x6dbcfa62 0xb46f9dc4 0x5e21fc7d 0x58c634f0
+ >;
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index c26c71b..fc74cd0 100644
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -34,6 +34,13 @@
reg = <0>;
intel,apic-id = <0>;
};
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "cpu-x86";
+ reg = <1>;
+ intel,apic-id = <1>;
+ };
};
pci {
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 2e785fa..7f16971 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -45,6 +45,13 @@
reg = <0>;
intel,apic-id = <0>;
};
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "cpu-x86";
+ reg = <1>;
+ intel,apic-id = <1>;
+ };
};
pci {
diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
index 82862f6..eb0d506 100644
--- a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
+++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
@@ -75,7 +75,8 @@ struct __packed upd_region {
uint8_t emmc45_ddr50_enabled; /* Offset 0x0051 */
uint8_t emmc45_hs200_enabled; /* Offset 0x0052 */
uint8_t emmc45_retune_timer_value; /* Offset 0x0053 */
- uint8_t unused_upd_space1[156]; /* Offset 0x0054 */
+ uint8_t enable_igd; /* Offset 0x0054 */
+ uint8_t unused_upd_space1[155]; /* Offset 0x0055 */
struct memory_down_data memory_params; /* Offset 0x00f0 */
uint16_t terminator; /* Offset 0x0100 */
};
diff --git a/arch/x86/include/asm/arch-efi/gpio.h b/arch/x86/include/asm/arch-efi/gpio.h
new file mode 100644
index 0000000..f044f07
--- /dev/null
+++ b/arch/x86/include/asm/arch-efi/gpio.h
@@ -0,0 +1,10 @@
+/*
+ * Copyright (c) 2015 Google, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _X86_ARCH_GPIO_H_
+#define _X86_ARCH_GPIO_H_
+
+#endif /* _X86_ARCH_GPIO_H_ */
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 08284ee..c70183c 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -27,6 +27,24 @@ enum {
X86_VENDOR_UNKNOWN = 0xff
};
+/* Global descriptor table (GDT) bits */
+enum {
+ GDT_4KB = 1ULL << 55,
+ GDT_32BIT = 1ULL << 54,
+ GDT_LONG = 1ULL << 53,
+ GDT_PRESENT = 1ULL << 47,
+ GDT_NOTSYS = 1ULL << 44,
+ GDT_CODE = 1ULL << 43,
+ GDT_LIMIT_LOW_SHIFT = 0,
+ GDT_LIMIT_LOW_MASK = 0xffff,
+ GDT_LIMIT_HIGH_SHIFT = 48,
+ GDT_LIMIT_HIGH_MASK = 0xf,
+ GDT_BASE_LOW_SHIFT = 16,
+ GDT_BASE_LOW_MASK = 0xffff,
+ GDT_BASE_HIGH_SHIFT = 56,
+ GDT_BASE_HIGH_MASK = 0xf,
+};
+
struct cpuid_result {
uint32_t eax;
uint32_t ebx;
@@ -212,6 +230,15 @@ char *cpu_get_name(char *name);
void cpu_call64(ulong pgtable, ulong setup_base, ulong target);
/**
+ * cpu_call32() - Jump to a 32-bit entry point
+ *
+ * @code_seg32: 32-bit code segment to use (GDT offset, e.g. 0x20)
+ * @target: Pointer to the start of the 32-bit U-Boot image/entry point
+ * @table: Pointer to start of info table to pass to U-Boot
+ */
+void cpu_call32(ulong code_seg32, ulong target, ulong table);
+
+/**
* cpu_jump_to_64bit() - Jump to a 64-bit Linux kernel
*
* The kernel is uncompressed and the 64-bit entry point is expected to be
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
new file mode 100644
index 0000000..3bdcdfe
--- /dev/null
+++ b/arch/x86/include/asm/elf.h
@@ -0,0 +1,46 @@
+/*
+ * Brought in from Linux 4.1, removed things not useful to U-Boot.
+ * The definitions perhaps came from the GNU Library which is GPL.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_X86_ELF_H
+#define _ASM_X86_ELF_H
+
+/* ELF register definitions */
+#define R_386_NONE 0
+#define R_386_32 1
+#define R_386_PC32 2
+#define R_386_GOT32 3
+#define R_386_PLT32 4
+#define R_386_COPY 5
+#define R_386_GLOB_DAT 6
+#define R_386_JMP_SLOT 7
+#define R_386_RELATIVE 8
+#define R_386_GOTOFF 9
+#define R_386_GOTPC 10
+#define R_386_NUM 11
+
+/* x86-64 relocation types */
+#define R_X86_64_NONE 0 /* No reloc */
+#define R_X86_64_64 1 /* Direct 64 bit */
+#define R_X86_64_PC32 2 /* PC relative 32 bit signed */
+#define R_X86_64_GOT32 3 /* 32 bit GOT entry */
+#define R_X86_64_PLT32 4 /* 32 bit PLT address */
+#define R_X86_64_COPY 5 /* Copy symbol at runtime */
+#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */
+#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */
+#define R_X86_64_RELATIVE 8 /* Adjust by program base */
+/* 32 bit signed pc relative offset to GOT */
+#define R_X86_64_GOTPCREL 9
+#define R_X86_64_32 10 /* Direct 32 bit zero extended */
+#define R_X86_64_32S 11 /* Direct 32 bit sign extended */
+#define R_X86_64_16 12 /* Direct 16 bit zero extended */
+#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
+#define R_X86_64_8 14 /* Direct 8 bit sign extended */
+#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
+
+#define R_X86_64_NUM 16
+
+#endif
diff --git a/arch/x86/include/asm/fsp/fsp_hob.h b/arch/x86/include/asm/fsp/fsp_hob.h
index 6cca7f5..3fb3546 100644
--- a/arch/x86/include/asm/fsp/fsp_hob.h
+++ b/arch/x86/include/asm/fsp/fsp_hob.h
@@ -8,6 +8,8 @@
#ifndef __FSP_HOB_H__
#define __FSP_HOB_H__
+#include <efi.h>
+
/* Type of HOB Header */
#define HOB_TYPE_MEM_ALLOC 0x0002
#define HOB_TYPE_RES_DESC 0x0003
@@ -25,63 +27,6 @@ struct hob_header {
u32 reserved; /* always zero */
};
-/* Enumeration of memory types introduced in UEFI */
-enum efi_mem_type {
- EFI_RESERVED_MEMORY_TYPE,
- /*
- * The code portions of a loaded application.
- * (Note that UEFI OS loaders are UEFI applications.)
- */
- EFI_LOADER_CODE,
- /*
- * The data portions of a loaded application and
- * the default data allocation type used by an application
- * to allocate pool memory.
- */
- EFI_LOADER_DATA,
- /* The code portions of a loaded Boot Services Driver */
- EFI_BOOT_SERVICES_CODE,
- /*
- * The data portions of a loaded Boot Serves Driver and
- * the default data allocation type used by a Boot Services
- * Driver to allocate pool memory.
- */
- EFI_BOOT_SERVICES_DATA,
- /* The code portions of a loaded Runtime Services Driver */
- EFI_RUNTIME_SERVICES_CODE,
- /*
- * The data portions of a loaded Runtime Services Driver and
- * the default data allocation type used by a Runtime Services
- * Driver to allocate pool memory.
- */
- EFI_RUNTIME_SERVICES_DATA,
- /* Free (unallocated) memory */
- EFI_CONVENTIONAL_MEMORY,
- /* Memory in which errors have been detected */
- EFI_UNUSABLE_MEMORY,
- /* Memory that holds the ACPI tables */
- EFI_ACPI_RECLAIM_MEMORY,
- /* Address space reserved for use by the firmware */
- EFI_ACPI_MEMORY_NVS,
- /*
- * Used by system firmware to request that a memory-mapped IO region
- * be mapped by the OS to a virtual address so it can be accessed by
- * EFI runtime services.
- */
- EFI_MMAP_IO,
- /*
- * System memory-mapped IO region that is used to translate
- * memory cycles to IO cycles by the processor.
- */
- EFI_MMAP_IO_PORT,
- /*
- * Address space reserved by the firmware for code that is
- * part of the processor.
- */
- EFI_PAL_CODE,
- EFI_MAX_MEMORY_TYPE
-};
-
/*
* Describes all memory ranges used during the HOB producer phase that
* exist outside the HOB list. This HOB type describes how memory is used,
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 4d9eac6..f7e3889 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -69,6 +69,7 @@ struct arch_global_data {
char *mrc_output;
unsigned int mrc_output_len;
void *gdt; /* Global descriptor table */
+ ulong table; /* Table pointer from previous loader */
};
#endif
@@ -76,6 +77,12 @@ struct arch_global_data {
#include <asm-generic/global_data.h>
#ifndef __ASSEMBLY__
+# ifdef CONFIG_EFI_APP
+
+#define gd global_data_ptr
+
+#define DECLARE_GLOBAL_DATA_PTR extern struct global_data *global_data_ptr
+# else
static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void)
{
gd_t *gd_ptr;
@@ -87,14 +94,15 @@ static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void)
#define gd get_fs_gd_ptr()
+#define DECLARE_GLOBAL_DATA_PTR
+# endif
+
#endif
/*
* Our private Global Data Flags
*/
-#define GD_FLG_COLD_BOOT 0x00100 /* Cold Boot */
-#define GD_FLG_WARM_BOOT 0x00200 /* Warm Boot */
-
-#define DECLARE_GLOBAL_DATA_PTR
+#define GD_FLG_COLD_BOOT 0x10000 /* Cold Boot */
+#define GD_FLG_WARM_BOOT 0x20000 /* Warm Boot */
#endif /* __ASM_GBL_DATA_H */
diff --git a/arch/x86/include/asm/relocate.h b/arch/x86/include/asm/relocate.h
index eb186b9..cff3abc 100644
--- a/arch/x86/include/asm/relocate.h
+++ b/arch/x86/include/asm/relocate.h
@@ -11,7 +11,6 @@
#include <common.h>
int copy_uboot_to_ram(void);
-int copy_fdt_to_ram(void);
int clear_bss(void);
int do_elf_reloc_fixups(void);
diff --git a/arch/x86/include/asm/types.h b/arch/x86/include/asm/types.h
index e272c90..766617f 100644
--- a/arch/x86/include/asm/types.h
+++ b/arch/x86/include/asm/types.h
@@ -44,8 +44,11 @@ typedef __INT64_TYPE__ s64;
typedef __UINT64_TYPE__ u64;
#endif
+#ifdef CONFIG_EFI_STUB_64BIT
+#define BITS_PER_LONG 64
+#else
#define BITS_PER_LONG 32
-
+#endif
/* Dma addresses are 32-bits wide. */
typedef u32 dma_addr_t;
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 43489fd..dcfe9ee 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -11,6 +11,7 @@ obj-y += bios_interrupts.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += cmd_boot.o
obj-$(CONFIG_HAVE_FSP) += cmd_hob.o
+obj-$(CONFIG_EFI) += efi/
obj-y += gcc.o
obj-y += init_helpers.o
obj-y += interrupts.o
@@ -34,7 +35,7 @@ obj-$(CONFIG_SYS_X86_TSC_TIMER) += tsc_timer.o
obj-$(CONFIG_CMD_ZBOOT) += zimage.o
obj-$(CONFIG_HAVE_FSP) += fsp/
-extra-$(CONFIG_USE_PRIVATE_LIBGCC) := lib.a
+extra-$(CONFIG_USE_PRIVATE_LIBGCC) += lib.a
NORMAL_LIBGCC = $(shell $(CC) $(PLATFORM_CPPFLAGS) -print-libgcc-file-name)
OBJCOPYFLAGS := --prefix-symbols=__normal_
diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c
index 70ccf1b..9da04dd 100644
--- a/arch/x86/lib/asm-offsets.c
+++ b/arch/x86/lib/asm-offsets.c
@@ -21,5 +21,6 @@ int main(void)
#ifdef CONFIG_HAVE_FSP
DEFINE(GD_HOB_LIST, offsetof(gd_t, arch.hob_list));
#endif
+ DEFINE(GD_TABLE, offsetof(gd_t, arch.table));
return 0;
}
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 86030cf..f441c84 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -22,6 +22,8 @@
#include <asm/arch/timestamp.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#define COMMAND_LINE_OFFSET 0x9000
/*
@@ -162,7 +164,11 @@ int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit)
* the data segments are 0x18, 4GB flat, and read/write.
* U-boot is setting them up that way for itself in
* arch/i386/cpu/cpu.c.
+ *
+ * Note that we cannot currently boot a kernel while running as
+ * an EFI application. Please use the payload option for that.
*/
+#ifndef CONFIG_EFI_APP
__asm__ __volatile__ (
"movl $0, %%ebp\n"
"cli\n"
@@ -171,6 +177,7 @@ int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit)
[boot_params] "S"(setup_base),
"b"(0), "D"(0)
);
+#endif
}
/* We can't get to here */
diff --git a/arch/x86/lib/efi/Kconfig b/arch/x86/lib/efi/Kconfig
new file mode 100644
index 0000000..e0975d3
--- /dev/null
+++ b/arch/x86/lib/efi/Kconfig
@@ -0,0 +1,11 @@
+if EFI
+
+config SYS_CAR_ADDR
+ hex
+ default 0x100000
+
+config SYS_CAR_SIZE
+ hex
+ default 0x20000
+
+endif
diff --git a/arch/x86/lib/efi/Makefile b/arch/x86/lib/efi/Makefile
new file mode 100644
index 0000000..af4503e
--- /dev/null
+++ b/arch/x86/lib/efi/Makefile
@@ -0,0 +1,27 @@
+#
+# (C) Copyright 2002-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_EFI_STUB) += car.o
+obj-$(CONFIG_EFI_STUB) += efi.o
+
+obj-$(CONFIG_EFI_APP) += crt0-efi-ia32.o reloc_ia32.o
+
+ifneq ($(CONFIG_EFI_STUB),)
+
+CFLAGS_REMOVE_reloc_ia32.o += -mregparm=3
+CFLAGS_reloc_ia32.o += -fpic -fshort-wchar
+
+# When building for 64-bit we must remove the i386-specific flags
+CFLAGS_REMOVE_reloc_x86_64.o += -mregparm=3 -march=i386 -m32
+CFLAGS_reloc_x86_64.o += -fpic -fshort-wchar
+
+AFLAGS_REMOVE_crt0-efi-x86_64.o += -mregparm=3 -march=i386 -m32
+AFLAGS_crt0-efi-x86_64.o += -fpic -fshort-wchar
+
+extra-$(CONFIG_EFI_STUB_32BIT) += crt0-efi-ia32.o reloc_ia32.o
+extra-$(CONFIG_EFI_STUB_64BIT) += crt0-efi-x86_64.o reloc_x86_64.o
+endif
diff --git a/arch/x86/lib/efi/car.S b/arch/x86/lib/efi/car.S
new file mode 100644
index 0000000..613af9a
--- /dev/null
+++ b/arch/x86/lib/efi/car.S
@@ -0,0 +1,10 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+.globl car_init
+car_init:
+ jmp car_init_ret
diff --git a/arch/x86/lib/efi/crt0-efi-ia32.S b/arch/x86/lib/efi/crt0-efi-ia32.S
new file mode 100644
index 0000000..30e5eb0
--- /dev/null
+++ b/arch/x86/lib/efi/crt0-efi-ia32.S
@@ -0,0 +1,52 @@
+/*
+ * crt0-efi-ia32.S - x86 EFI startup code.
+ *
+ * Copyright (C) 1999 Hewlett-Packard Co.
+ * Contributed by David Mosberger <davidm@hpl.hp.com>.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+ .text
+ .align 4
+
+ .globl _start
+_start:
+ pushl %ebp
+ movl %esp,%ebp
+
+ pushl 12(%ebp) # copy "image" argument
+ pushl 8(%ebp) # copy "systab" argument
+
+ call 0f
+0: popl %eax
+ movl %eax,%ebx
+
+ addl $image_base-0b,%eax # %eax = ldbase
+ addl $_DYNAMIC-0b,%ebx # %ebx = _DYNAMIC
+
+ pushl %ebx # pass _DYNAMIC as second argument
+ pushl %eax # pass ldbase as first argument
+ call _relocate
+ popl %ebx
+ popl %ebx
+ testl %eax,%eax
+ jne .exit
+ call efi_main # call app with "image" and "systab" argument
+
+.exit: leave
+ ret
+
+ /*
+ * hand-craft a dummy .reloc section so EFI knows it's a relocatable
+ * executable:
+ */
+ .data
+dummy: .long 0
+
+#define IMAGE_REL_ABSOLUTE 0
+ .section .reloc
+ .long dummy /* Page RVA */
+ .long 10 /* Block Size (2*4+2) */
+ .word (IMAGE_REL_ABSOLUTE << 12) + 0 /* reloc for dummy */
diff --git a/arch/x86/lib/efi/crt0-efi-x86_64.S b/arch/x86/lib/efi/crt0-efi-x86_64.S
new file mode 100644
index 0000000..c5cbf41
--- /dev/null
+++ b/arch/x86/lib/efi/crt0-efi-x86_64.S
@@ -0,0 +1,51 @@
+/*
+ * crt0-efi-x86_64.S - x86_64 EFI startup code.
+ * Copyright (C) 1999 Hewlett-Packard Co.
+ * Contributed by David Mosberger <davidm@hpl.hp.com>.
+ * Copyright (C) 2005 Intel Co.
+ * Contributed by Fenghua Yu <fenghua.yu@intel.com>.
+ *
+ * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+ .text
+ .align 4
+
+ .globl _start
+_start:
+ subq $8, %rsp
+ pushq %rcx
+ pushq %rdx
+
+0:
+ lea image_base(%rip), %rdi
+ lea _DYNAMIC(%rip), %rsi
+
+ popq %rcx
+ popq %rdx
+ pushq %rcx
+ pushq %rdx
+ call _relocate
+
+ popq %rdi
+ popq %rsi
+
+ call efi_main
+ addq $8, %rsp
+
+.exit:
+ ret
+
+ /*
+ * hand-craft a dummy .reloc section so EFI knows it's a relocatable
+ * executable:
+ */
+ .data
+dummy: .long 0
+
+#define IMAGE_REL_ABSOLUTE 0
+ .section .reloc, "a"
+label1:
+ .long dummy-label1 /* Page RVA */
+ .long 10 /* Block Size (2*4+2) */
+ .word (IMAGE_REL_ABSOLUTE << 12) + 0 /* reloc for dummy */
diff --git a/arch/x86/lib/efi/efi.c b/arch/x86/lib/efi/efi.c
new file mode 100644
index 0000000..ede5d56
--- /dev/null
+++ b/arch/x86/lib/efi/efi.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <efi.h>
+#include <errno.h>
+#include <linux/err.h>
+#include <linux/types.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * This function looks for the highest region of memory lower than 4GB which
+ * has enough space for U-Boot where U-Boot is aligned on a page boundary.
+ * It overrides the default implementation found elsewhere which simply
+ * picks the end of ram, wherever that may be. The location of the stack,
+ * the relocation address, and how far U-Boot is moved by relocation are
+ * set in the global data structure.
+ */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ struct efi_mem_desc *desc, *end;
+ struct efi_entry_memmap *map;
+ int ret, size;
+ uintptr_t dest_addr = 0;
+ struct efi_mem_desc *largest = NULL;
+
+ /*
+ * Find largest area of memory below 4GB. We could
+ * call efi_build_mem_table() for a more accurate picture since it
+ * merges areas together where possible. But that function uses more
+ * pre-relocation memory, and it's not critical that we find the
+ * absolute largest region.
+ */
+ ret = efi_info_get(EFIET_MEMORY_MAP, (void **)&map, &size);
+ if (ret) {
+ /* We should have stopped in dram_init(), something is wrong */
+ debug("%s: Missing memory map\n", __func__);
+ goto err;
+ }
+
+ end = (struct efi_mem_desc *)((ulong)map + size);
+ desc = map->desc;
+ for (; desc < end; desc = efi_get_next_mem_desc(map, desc)) {
+ if (desc->type != EFI_CONVENTIONAL_MEMORY ||
+ desc->physical_start >= 1ULL << 32)
+ continue;
+ if (!largest || desc->num_pages > largest->num_pages)
+ largest = desc;
+ }
+
+ /* If no suitable area was found, return an error. */
+ assert(largest);
+ if (!largest || (largest->num_pages << EFI_PAGE_SHIFT) < (2 << 20))
+ goto err;
+
+ dest_addr = largest->physical_start + (largest->num_pages <<
+ EFI_PAGE_SHIFT);
+
+ return (ulong)dest_addr;
+err:
+ panic("No available memory found for relocation");
+ return 0;
+}
+
+int dram_init(void)
+{
+ struct efi_mem_desc *desc, *end;
+ struct efi_entry_memmap *map;
+ int size, ret;
+
+ ret = efi_info_get(EFIET_MEMORY_MAP, (void **)&map, &size);
+ if (ret) {
+ printf("Cannot find EFI memory map tables, ret=%d\n", ret);
+
+ return -ENODEV;
+ }
+
+ end = (struct efi_mem_desc *)((ulong)map + size);
+ gd->ram_size = 0;
+ desc = map->desc;
+ for (; desc < end; desc = efi_get_next_mem_desc(map, desc)) {
+ if (desc->type < EFI_MMAP_IO)
+ gd->ram_size += desc->num_pages << EFI_PAGE_SHIFT;
+ }
+
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ struct efi_mem_desc *desc, *end;
+ struct efi_entry_memmap *map;
+ int ret, size;
+ int num_banks;
+
+ ret = efi_info_get(EFIET_MEMORY_MAP, (void **)&map, &size);
+ if (ret) {
+ /* We should have stopped in dram_init(), something is wrong */
+ debug("%s: Missing memory map\n", __func__);
+ return;
+ }
+ end = (struct efi_mem_desc *)((ulong)map + size);
+ desc = map->desc;
+ for (num_banks = 0;
+ desc < end && num_banks < CONFIG_NR_DRAM_BANKS;
+ desc = efi_get_next_mem_desc(map, desc)) {
+ /*
+ * We only use conventional memory below 4GB, and ignore
+ * anything less than 1MB.
+ */
+ if (desc->type != EFI_CONVENTIONAL_MEMORY ||
+ desc->physical_start >= 1ULL << 32 ||
+ (desc->num_pages << EFI_PAGE_SHIFT) < 1 << 20)
+ continue;
+ gd->bd->bi_dram[num_banks].start = desc->physical_start;
+ gd->bd->bi_dram[num_banks].size = desc->num_pages <<
+ EFI_PAGE_SHIFT;
+ num_banks++;
+ }
+}
+
+int print_cpuinfo(void)
+{
+ return default_print_cpuinfo();
+}
+
+/* Find any available tables and copy them to a safe place */
+int reserve_arch(void)
+{
+ struct efi_info_hdr *hdr;
+
+ debug("table=%lx\n", gd->arch.table);
+ if (!gd->arch.table)
+ return 0;
+
+ hdr = (struct efi_info_hdr *)gd->arch.table;
+
+ gd->start_addr_sp -= hdr->total_size;
+ memcpy((void *)gd->start_addr_sp, hdr, hdr->total_size);
+ debug("Stashing EFI table at %lx to %lx, size %x\n",
+ gd->arch.table, gd->start_addr_sp, hdr->total_size);
+ gd->arch.table = gd->start_addr_sp;
+
+ return 0;
+}
diff --git a/arch/x86/lib/efi/reloc_ia32.c b/arch/x86/lib/efi/reloc_ia32.c
new file mode 100644
index 0000000..4d68255
--- /dev/null
+++ b/arch/x86/lib/efi/reloc_ia32.c
@@ -0,0 +1,72 @@
+/*
+ * reloc_ia32.c - position independent x86 ELF shared object relocator
+ * Copyright (C) 1999 Hewlett-Packard Co.
+ * Contributed by David Mosberger <davidm@hpl.hp.com>.
+ *
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <common.h>
+#include <efi.h>
+#include <elf.h>
+#include <asm/elf.h>
+
+efi_status_t _relocate(long ldbase, Elf32_Dyn *dyn, efi_handle_t image,
+ struct efi_system_table *systab)
+{
+ long relsz = 0, relent = 0;
+ Elf32_Rel *rel = 0;
+ unsigned long *addr;
+ int i;
+
+ for (i = 0; dyn[i].d_tag != DT_NULL; ++i) {
+ switch (dyn[i].d_tag) {
+ case DT_REL:
+ rel = (Elf32_Rel *)((unsigned long)dyn[i].d_un.d_ptr +
+ ldbase);
+ break;
+
+ case DT_RELSZ:
+ relsz = dyn[i].d_un.d_val;
+ break;
+
+ case DT_RELENT:
+ relent = dyn[i].d_un.d_val;
+ break;
+
+ case DT_RELA:
+ break;
+
+ default:
+ break;
+ }
+ }
+
+ if (!rel && relent == 0)
+ return EFI_SUCCESS;
+
+ if (!rel || relent == 0)
+ return EFI_LOAD_ERROR;
+
+ while (relsz > 0) {
+ /* apply the relocs */
+ switch (ELF32_R_TYPE(rel->r_info)) {
+ case R_386_NONE:
+ break;
+
+ case R_386_RELATIVE:
+ addr = (unsigned long *)(ldbase + rel->r_offset);
+ *addr += ldbase;
+ break;
+
+ default:
+ break;
+ }
+ rel = (Elf32_Rel *)((char *)rel + relent);
+ relsz -= relent;
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/arch/x86/lib/efi/reloc_x86_64.c b/arch/x86/lib/efi/reloc_x86_64.c
new file mode 100644
index 0000000..5f71f2a
--- /dev/null
+++ b/arch/x86/lib/efi/reloc_x86_64.c
@@ -0,0 +1,66 @@
+/*
+ * reloc_x86_64.c - position independent x86_64 ELF shared object relocator
+ * Copyright (C) 1999 Hewlett-Packard Co.
+ * Contributed by David Mosberger <davidm@hpl.hp.com>.
+ * Copyright (C) 2005 Intel Co.
+ * Contributed by Fenghua Yu <fenghua.yu@intel.com>.
+ *
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <common.h>
+#include <efi.h>
+#include <elf.h>
+#include <asm/elf.h>
+
+efi_status_t _relocate(long ldbase, Elf64_Dyn *dyn, efi_handle_t image,
+ struct efi_system_table *systab)
+{
+ long relsz = 0, relent = 0;
+ Elf64_Rel *rel = 0;
+ unsigned long *addr;
+ int i;
+
+ for (i = 0; dyn[i].d_tag != DT_NULL; ++i) {
+ switch (dyn[i].d_tag) {
+ case DT_RELA:
+ rel = (Elf64_Rel *)
+ ((unsigned long)dyn[i].d_un.d_ptr + ldbase);
+ break;
+ case DT_RELASZ:
+ relsz = dyn[i].d_un.d_val;
+ break;
+ case DT_RELAENT:
+ relent = dyn[i].d_un.d_val;
+ break;
+ default:
+ break;
+ }
+ }
+
+ if (!rel && relent == 0)
+ return EFI_SUCCESS;
+
+ if (!rel || relent == 0)
+ return EFI_LOAD_ERROR;
+
+ while (relsz > 0) {
+ /* apply the relocs */
+ switch (ELF64_R_TYPE(rel->r_info)) {
+ case R_X86_64_NONE:
+ break;
+ case R_X86_64_RELATIVE:
+ addr = (unsigned long *)(ldbase + rel->r_offset);
+ *addr += ldbase;
+ break;
+ default:
+ break;
+ }
+ rel = (Elf64_Rel *)((char *)rel + relent);
+ relsz -= relent;
+ }
+
+ return EFI_SUCCESS;
+}
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 5b25632..c585710 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -11,6 +11,8 @@
#include <asm/processor.h>
#include <asm/fsp/fsp_support.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int print_cpuinfo(void)
{
post_code(POST_CPU_INFO);
diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c
index 6aeb4d4..c6e8f73 100644
--- a/arch/x86/lib/lpc-uclass.c
+++ b/arch/x86/lib/lpc-uclass.c
@@ -9,6 +9,8 @@
#include <dm.h>
#include <dm/root.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static int lpc_uclass_post_bind(struct udevice *bus)
{
/*
diff --git a/arch/x86/lib/pch-uclass.c b/arch/x86/lib/pch-uclass.c
index d1082e1..20dfa81 100644
--- a/arch/x86/lib/pch-uclass.c
+++ b/arch/x86/lib/pch-uclass.c
@@ -9,6 +9,8 @@
#include <dm.h>
#include <dm/root.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static int pch_uclass_post_bind(struct udevice *bus)
{
/*
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index b33586b..0d683bf 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -17,8 +17,6 @@
#include <common.h>
#include <inttypes.h>
-#include <libfdt.h>
-#include <malloc.h>
#include <asm/u-boot-x86.h>
#include <asm/relocate.h>
#include <asm/sections.h>
@@ -30,32 +28,20 @@ int copy_uboot_to_ram(void)
{
size_t len = (size_t)&__data_end - (size_t)&__text_start;
+ if (gd->flags & GD_FLG_SKIP_RELOC)
+ return 0;
memcpy((void *)gd->relocaddr, (void *)&__text_start, len);
return 0;
}
-int copy_fdt_to_ram(void)
-{
- if (gd->new_fdt) {
- ulong fdt_size;
-
- fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
-
- memcpy(gd->new_fdt, gd->fdt_blob, fdt_size);
- debug("Relocated fdt from %p to %p, size %lx\n",
- gd->fdt_blob, gd->new_fdt, fdt_size);
- gd->fdt_blob = gd->new_fdt;
- }
-
- return 0;
-}
-
int clear_bss(void)
{
ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
+ if (gd->flags & GD_FLG_SKIP_RELOC)
+ return 0;
memset((void *)dst_addr, 0x00, len);
return 0;
@@ -72,36 +58,43 @@ int do_elf_reloc_fixups(void)
Elf32_Addr *offset_ptr_rom, *last_offset = NULL;
Elf32_Addr *offset_ptr_ram;
+ unsigned int text_base = 0;
/* The size of the region of u-boot that runs out of RAM. */
uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start;
+ if (gd->flags & GD_FLG_SKIP_RELOC)
+ return 0;
if (re_src == re_end)
panic("No relocation data");
+#ifdef CONFIG_SYS_TEXT_BASE
+ text_base = CONFIG_SYS_TEXT_BASE;
+#else
+ panic("No CONFIG_SYS_TEXT_BASE");
+#endif
do {
/* Get the location from the relocation entry */
offset_ptr_rom = (Elf32_Addr *)re_src->r_offset;
/* Check that the location of the relocation is in .text */
- if (offset_ptr_rom >= (Elf32_Addr *)CONFIG_SYS_TEXT_BASE &&
- offset_ptr_rom > last_offset) {
+ if (offset_ptr_rom >= (Elf32_Addr *)text_base &&
+ offset_ptr_rom > last_offset) {
/* Switch to the in-RAM version */
offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
gd->reloc_off);
/* Check that the target points into .text */
- if (*offset_ptr_ram >= CONFIG_SYS_TEXT_BASE &&
- *offset_ptr_ram <=
- (CONFIG_SYS_TEXT_BASE + size)) {
+ if (*offset_ptr_ram >= text_base &&
+ *offset_ptr_ram <= text_base + size) {
*offset_ptr_ram += gd->reloc_off;
} else {
debug(" %p: rom reloc %x, ram %p, value %x,"
" limit %" PRIXPTR "\n", re_src,
re_src->r_offset, offset_ptr_ram,
*offset_ptr_ram,
- CONFIG_SYS_TEXT_BASE + size);
+ text_base + size);
}
} else {
debug(" %p: rom reloc %x, last %p\n", re_src,
diff --git a/arch/x86/lib/tsc_timer.c b/arch/x86/lib/tsc_timer.c
index 7f5ba2c..0df1af2 100644
--- a/arch/x86/lib/tsc_timer.c
+++ b/arch/x86/lib/tsc_timer.c
@@ -355,7 +355,15 @@ void __udelay(unsigned long usec)
stop = now + usec * get_tbclk_mhz();
while ((int64_t)(stop - get_ticks()) > 0)
+#if defined(CONFIG_QEMU) && defined(CONFIG_SMP)
+ /*
+ * Add a 'pause' instruction on qemu target,
+ * to give other VCPUs a chance to run.
+ */
+ asm volatile("pause");
+#else
;
+#endif
}
int timer_init(void)