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author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2013-12-11 12:49:13 +0530 |
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committer | York Sun <yorksun@freescale.com> | 2013-12-11 11:12:54 -0800 |
commit | e03c76c30342797a25ef9350e51c8daa0b56f1df (patch) | |
tree | 8e1c895676a107de39e30ee330c7b6a3af6fbd8c /arch | |
parent | 5037947a02f884219795e2c989d3a0a840fcd292 (diff) | |
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powerpc/mpc85xx: Update CONFIG_SYS_FSL_TBCLK_DIV for T1040
The default value of CONFIG_SYS_FSL_TBCLK_DIV is 16.
So, update its value as default.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 99e16bd..244ccbf 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -711,7 +711,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_FM_PLAT_CLK_DIV 1 #define CONFIG_SYS_FM1_CLK CONFIG_FM_PLAT_CLK_DIV #define CONFIG_SYS_FM_MURAM_SIZE 0x30000 -#define CONFIG_SYS_FSL_TBCLK_DIV 32 +#define CONFIG_SYS_FSL_TBCLK_DIV 16 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_USB2_PHY_ENABLE |