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authorStefan Roese <sr@denx.de>2010-09-16 14:01:53 +0200
committerStefan Roese <sr@denx.de>2010-09-23 08:49:49 +0200
commit8a805df13615667ebdcc9f3a3a6fbf6c7778a992 (patch)
tree67e61ba7679d82a64dbcb3d55344a31a22a7e6da /arch
parentab25e880ca9d508b7a807aa969105af32c3e6e51 (diff)
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ppc4xx/fdt/flash: Change fdt_fixup_nor_flash_node() to not rely on cs size
This patch changes the behaviour of the fdt_fixup_nor_flash_node() function. Now it doesn't patch the size of the "reg" property with the chip-select size, but with the size returned from the new function flash_get_bank_size(). This function will return per weak default the flash size of the bank (bank = chip-select numer) detected by the flash driver. If this does not fit your needs, this function may be overridden by a board specific one. For this the parameters needed to be changed. So I intentionally squashed the PPC4xx stuff using this routine into this patch. Otherwise it would not be git-bisectable anymore. The board specific function for the AMCC/APM Ebony eval board is now included in this patch version. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Detlev Zundel <dzu@denx.de> Cc: Gerald Van Baren <vanbaren@cideas.com> Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/cpu/ppc4xx/fdt.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c
index 15a184b..e99b2b0 100644
--- a/arch/powerpc/cpu/ppc4xx/fdt.c
+++ b/arch/powerpc/cpu/ppc4xx/fdt.c
@@ -59,14 +59,14 @@ void __ft_board_setup(void *blob, bd_t *bd)
*p++ = 0;
*p++ = bxcr & EBC_BXCR_BAS_MASK;
*p++ = EBC_BXCR_BANK_SIZE(bxcr);
+ }
+ }
+
#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
- /* Try to update reg property in nor flash node too */
- fdt_fixup_nor_flash_size(blob, i,
- EBC_BXCR_BANK_SIZE(bxcr));
+ /* Update reg property in all nor flash nodes too */
+ fdt_fixup_nor_flash_size(blob);
#endif
- }
- }
/* Some 405 PPC's have EBC as direct PLB child in the dts */
if (fdt_path_offset(blob, ebc_path) < 0)