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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-04-07 19:13:42 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-04-07 19:13:42 +0200
commit284bb60ed6636df3794ba102dd4325a96f1206e9 (patch)
treead50491bf8f67237dd3083e2f454fcd2fe40b262 /arch
parent1e6ad55c058200010bb0649524a2c874e7049242 (diff)
parent68659d649debc9fb3d8ce21ce4dcfe3a66b63e3a (diff)
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Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/start.S7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index ac1e55a..27be451 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -205,7 +205,7 @@ ENTRY(cpu_init_cp15)
mcr p15, 0, r0, c1, c0, 0 @ write system control register
#endif
-#ifdef CONFIG_ARM_ERRATA_742230
+#if (defined(CONFIG_ARM_ERRATA_742230) || defined(CONFIG_ARM_ERRATA_794072))
mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
orr r0, r0, #1 << 4 @ set bit #4
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
@@ -222,6 +222,11 @@ ENTRY(cpu_init_cp15)
orr r0, r0, #1 << 11 @ set bit #11
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
#endif
+#ifdef CONFIG_ARM_ERRATA_761320
+ mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
+ orr r0, r0, #1 << 21 @ set bit #21
+ mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
+#endif
mov pc, lr @ back to my caller
ENDPROC(cpu_init_cp15)