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authorSimon Glass <sjg@chromium.org>2014-12-17 15:50:37 +0800
committerSimon Glass <sjg@chromium.org>2014-12-18 17:26:06 -0700
commit0f61de8d9dba4ebfc4ea4b2da7f91adc937b3875 (patch)
tree14058b8a1549a61ffa69b06ca748a9a66cdfac24 /arch
parentb2e02d28653edac48d6def9791f2fa0ebc491498 (diff)
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x86: Convert microcode format to device-tree-only
To avoid having two microcode formats, adjust the build system to support obtaining the microcode from the device tree, even in the case where it must be made available before the device tree can be accessed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/cpu/queensbay/tnc_car.S11
-rw-r--r--arch/x86/dts/crownbay.dts7
2 files changed, 11 insertions, 7 deletions
diff --git a/arch/x86/cpu/queensbay/tnc_car.S b/arch/x86/cpu/queensbay/tnc_car.S
index 6834a64..2e9139e 100644
--- a/arch/x86/cpu/queensbay/tnc_car.S
+++ b/arch/x86/cpu/queensbay/tnc_car.S
@@ -116,12 +116,9 @@ temp_ram_init_romstack:
.long temp_ram_init_ret
.long temp_ram_init_params
temp_ram_init_params:
- .long ucode_start /* microcode base */
- .long ucode_size /* microcode size */
+_dt_ucode_base_size:
+ /* These next two fields are filled in by ifdtool */
+ .long 0 /* microcode base */
+ .long 0 /* microcode size */
.long CONFIG_SYS_MONITOR_BASE /* code region base */
.long CONFIG_SYS_MONITOR_LEN /* code region size */
-
- .balign 4
-ucode_start:
- .include "arch/x86/cpu/queensbay/M0220661105.inc"
-ucode_size = ( . - ucode_start)
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 399dafb..3f43f3c 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -50,4 +50,11 @@
memory-map = <0xffe00000 0x00200000>;
};
};
+
+ microcode {
+ update@0 {
+#include "microcode/m0220661105_cv.dtsi"
+ };
+ };
+
};