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| author | Adrian Alonso <aalonso@freescale.com> | 2015-04-02 18:17:11 -0500 |
|---|---|---|
| committer | Peng Fan <Peng.Fan@freescale.com> | 2015-04-29 15:05:41 +0800 |
| commit | 26cd1312117d87f1b3e74a0316853902b5a460ac (patch) | |
| tree | a0453b50efc6a388b9048eeadafb6b6f899c43d5 /arch | |
| parent | 6da68bd152dc659dde382e6327d939ec41467537 (diff) | |
| download | u-boot-imx-26cd1312117d87f1b3e74a0316853902b5a460ac.zip u-boot-imx-26cd1312117d87f1b3e74a0316853902b5a460ac.tar.gz u-boot-imx-26cd1312117d87f1b3e74a0316853902b5a460ac.tar.bz2 | |
MLK-10566: arm :imx7d: fix iomuxc-lpsr daisy chain settings
* For IOMUXC LPSR pads when daisy chain register needs to be set the
result offsets for sel_input register is incorrect as base address is
0x302C0000 and the passed offset does not resolve to the intended input
sel pad register; input sel base offset should start in 0x30330000.
* Add an addiotional fixed offset of 0x70000 to address the
input sel offset:
INPUT_SEL = 0x302C0000 + 0x70000 + sel_input_ofs.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 5d4612613eb2e85f1929d8cf5cb6aac6ba9e5fd7)
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/imx-common/iomux-v3.c | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/imx-common/iomux-v3.h | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c index 50877d5..caea52e 100644 --- a/arch/arm/imx-common/iomux-v3.c +++ b/arch/arm/imx-common/iomux-v3.c @@ -48,6 +48,9 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) base = (void *)IOMUXC_LPSR_BASE_ADDR; mux_mode &= ~IOMUX_CONFIG_LPSR; } + + if (sel_input_ofs) + sel_input_ofs += IOMUX_LPSR_SEL_INPUT_OFS; #endif __raw_writel(mux_mode, base + mux_ctrl_ofs); diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h index 402b492..49c21d6 100644 --- a/arch/arm/include/asm/imx-common/iomux-v3.h +++ b/arch/arm/include/asm/imx-common/iomux-v3.h @@ -87,6 +87,7 @@ typedef u64 iomux_v3_cfg_t; #ifdef CONFIG_MX7 +#define IOMUX_LPSR_SEL_INPUT_OFS 0x70000 #define IOMUX_CONFIG_LPSR 0x8 #define MUX_MODE_LPSR ((iomux_v3_cfg_t)IOMUX_CONFIG_LPSR << \ MUX_MODE_SHIFT) |