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author | Tom Rini <trini@ti.com> | 2014-07-09 09:21:51 -0400 |
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committer | Tom Rini <trini@ti.com> | 2014-07-09 09:21:51 -0400 |
commit | 22692ec0fbdb455ca16d4d0e27768c6b6deb4243 (patch) | |
tree | d7e64a0e9582e3dd0b3a52261fe5f0110829927e /arch | |
parent | 80a7cac033082ec3e106cfcc736a126ec6547d85 (diff) | |
parent | 157f45da91b306d71dbf3a51325352dc11bf16d1 (diff) | |
download | u-boot-imx-22692ec0fbdb455ca16d4d0e27768c6b6deb4243.zip u-boot-imx-22692ec0fbdb455ca16d4d0e27768c6b6deb4243.tar.gz u-boot-imx-22692ec0fbdb455ca16d4d0e27768c6b6deb4243.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 5 |
2 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index bd65a08..7dd83ec 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -80,7 +80,7 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq) div = __raw_readl(&imx_ccm->analog_pll_sys); div &= BM_ANADIG_PLL_SYS_DIV_SELECT; - return infreq * (div >> 1); + return (infreq * div) >> 1; case PLL_BUS: div = __raw_readl(&imx_ccm->analog_pll_528); div &= BM_ANADIG_PLL_528_DIV_SELECT; diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 1725279..f20bdeb 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -124,10 +124,9 @@ static void clear_ldo_ramp(void) } /* - * Set the VDDSOC + * Set the PMU_REG_CORE register * - * Mask out the REG_CORE[22:18] bits (REG2_TRIG) and set - * them to the specified millivolt level. + * Set LDO_SOC/PU/ARM regulators to the specified millivolt level. * Possible values are from 0.725V to 1.450V in steps of * 0.025V (25mV). */ |