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| author | Liu Gang <Gang.Liu@freescale.com> | 2013-06-28 17:58:37 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-08-09 12:41:40 -0700 |
| commit | 17b8614754e9adc531d3f1bc3db66bf680a09447 (patch) | |
| tree | 8c3e533eb9a5d548180822b69436a90f783a2b16 /arch | |
| parent | 45fdb627b3849432cd17adda4bd2763e68c8df94 (diff) | |
| download | u-boot-imx-17b8614754e9adc531d3f1bc3db66bf680a09447.zip u-boot-imx-17b8614754e9adc531d3f1bc3db66bf680a09447.tar.gz u-boot-imx-17b8614754e9adc531d3f1bc3db66bf680a09447.tar.bz2 | |
powerpc/srio-pcie-boot: Avoid the NOR_BOOT macro when boot from SRIO/PCIE
When a board (slave) boots from SRIO/PCIE, it would get the instructions
from a remote board (master) by SRIO/PCIE interface, and the slave's
u-boot image should be built with the
SYS_TEXT_BASE=0xFFF80000;
So the u-boot of the slave should avoid the NOR_BOOT branch at the
booting stage.
For example, when a P2041RDB boots from SRIO/PCIE, it will set TLB
entry 15 from base address "CONFIG_SYS_MONITOR_BASE & 0xffc00000",
and with the 4M size as the boot window in NOR_BOOT branch. Because
the CONFIG_SYS_MONITOR_BASE = CONFIG_SYS_TEXT_BASE = 0xFFF80000, so
the TLB entry will be from base address 0xffc00000 and with 4M size.
Then the u-boot will set TLB entry 14 from base address
"CONFIG_SYS_INIT_RAM_ADDR", and with the 16K size as the initial
stack window. For the P2041RDB platform, the CONFIG_SYS_INIT_RAM_ADDR
= 0xffd00000. So the TLB entry 14 and 15 will be in confliction.
There will be right TLB entries configurations when avoid the
NOR_BOOT branch and set the boot window from 0xfff00000 with 1M
size space.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index cfc3a60..ad57a9c 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -33,7 +33,8 @@ #define MINIMAL_SPL #endif -#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT) +#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) && \ + !defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define NOR_BOOT #endif |