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authorMike Looijmans <mike.looijmans@topic.nl>2014-03-06 14:43:36 +0100
committerMichal Simek <michal.simek@xilinx.com>2014-05-14 07:43:34 +0200
commitdc4a1a2729f9ccaa473cf017c8bd4be4f242cafe (patch)
tree31eabd9361d8026b447921e96905ab3160cb9e79 /arch
parent2da7a745b6d24eec7be30e7d11ca456d445e30c3 (diff)
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ARM: zynq: Fix bootmode mask
Bootmode mask was defined as 0x0F, but documentation mentions 0x07. Experiments show that bit "3" is the JTAG chain configuration. Change the mask to "7" to allow systems with a different chain configuration to boot correctly. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-zynq/hardware.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-zynq/hardware.h b/arch/arm/include/asm/arch-zynq/hardware.h
index 20f62bf..a9d091f 100644
--- a/arch/arm/include/asm/arch-zynq/hardware.h
+++ b/arch/arm/include/asm/arch-zynq/hardware.h
@@ -25,7 +25,7 @@
#define ZYNQ_EFUSE_BASEADDR 0xF800D000
/* Bootmode setting values */
-#define ZYNQ_BM_MASK 0xF
+#define ZYNQ_BM_MASK 0x7
#define ZYNQ_BM_NOR 0x2
#define ZYNQ_BM_SD 0x5
#define ZYNQ_BM_JTAG 0x0