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| author | Ye.Li <B37916@freescale.com> | 2015-09-08 18:00:43 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2015-09-08 20:42:06 +0800 |
| commit | 8775d76a5b062b13c31267b9ddf2045381b92c4d (patch) | |
| tree | e873a001d93f5515dfe41a7de634da6e3aa58975 /arch | |
| parent | 70ba74f0e7ab55f1e17370a5ace81f59d3520949 (diff) | |
| download | u-boot-imx-8775d76a5b062b13c31267b9ddf2045381b92c4d.zip u-boot-imx-8775d76a5b062b13c31267b9ddf2045381b92c4d.tar.gz u-boot-imx-8775d76a5b062b13c31267b9ddf2045381b92c4d.tar.bz2 | |
MLK-11505 imx: mx6ul: Disable the LCDIF before system reset
We meet reset failure on mx6ul 9x9 evk. The internal reset logic between MMDC and
functional modules seems relate with the issue.
Turn off the LCDIF to stop DDR access before reset to avoid this possible internal
reset problem.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 7266d10..79b99b2 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -24,6 +24,7 @@ #include <asm/arch/crm_regs.h> #include <dm.h> #include <imx_thermal.h> +#include <mxsfb.h> #ifdef CONFIG_FSL_FASTBOOT #ifdef CONFIG_ANDROID_RECOVERY #include <recovery.h> @@ -784,6 +785,14 @@ void set_wdog_reset(struct wdog_regs *wdog) writew(reg, &wdog->wcr); } +void reset_misc(void) +{ +#ifdef CONFIG_VIDEO_MXS + if (is_cpu_type(MXC_CPU_MX6UL)) + lcdif_power_down(); +#endif +} + #ifdef CONFIG_LDO_BYPASS_CHECK DECLARE_GLOBAL_DATA_PTR; static int ldo_bypass; |