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authorTimur Tabi <timur@freescale.com>2011-04-13 10:38:23 -0500
committerKumar Gala <galak@kernel.crashing.org>2011-04-28 22:09:23 -0500
commit7d6d9ba9d0cb0bb2fefc4ce16c191c1bbad7b656 (patch)
tree5b68bc185603892102ee768ed438a10b318af80f /arch
parentda30b9fd97f031a6b6863359f3d4c6633e5c7035 (diff)
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powerpc/85xx: Display SERDES 8 erratum warning if banks are not disabled
The work-around for P4080 erratum SERDES-8 requires all lanes of banks two and three to be disabled (powered down) in the RCW. Display a warning message if this is not the case. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index edacdb8..f5452c0 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -476,6 +476,17 @@ void fsl_serdes_init(void)
#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8
/*
+ * Display a warning if banks two and three are not disabled in the RCW,
+ * since our work-around for SERDES8 depends on these banks being
+ * disabled at power-on.
+ */
+#define B2_B3 (FSL_CORENET_RCWSRn_SRDS_LPD_B2 | FSL_CORENET_RCWSRn_SRDS_LPD_B3)
+ if ((in_be32(&gur->rcwsr[5]) & B2_B3) != B2_B3) {
+ printf("Warning: SERDES8 requires banks two and "
+ "three to be disabled in the RCW\n");
+ }
+
+ /*
* Store the values of the fsl_srds_lpd_b2 and fsl_srds_lpd_b3
* hwconfig options into the srds_lpd_b[] array. See README.p4080ds
* for a description of these options.