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| author | Peng Fan <Peng.Fan@freescale.com> | 2015-03-09 10:22:41 +0800 |
|---|---|---|
| committer | Peng Fan <Peng.Fan@freescale.com> | 2015-04-29 14:56:22 +0800 |
| commit | 1502b4a8bbae15a7f7e36f876de770d92a51a717 (patch) | |
| tree | 3219f73ecc307f8c6bf0fe79a39563d164ac473b /arch | |
| parent | d84cb3e1cf93b4f06068797c7eb606ab19ab14b6 (diff) | |
| download | u-boot-imx-1502b4a8bbae15a7f7e36f876de770d92a51a717.zip u-boot-imx-1502b4a8bbae15a7f7e36f876de770d92a51a717.tar.gz u-boot-imx-1502b4a8bbae15a7f7e36f876de770d92a51a717.tar.bz2 | |
MLK-10176-6 imx: mx7: Modify GPT timer driver for mx7
Modify the GPT common platform driver for mx7 which only use 24Mhz
OSC as clock source.
Note: at default, the mx7d will use system counter as timer. The GPT
is disabled.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 6e250796d6a07d84093eeae96e5a6e4c593cdb0b)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/imx-common/timer.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c index e522990..c9eb530 100644 --- a/arch/arm/imx-common/timer.c +++ b/arch/arm/imx-common/timer.c @@ -2,7 +2,7 @@ * (C) Copyright 2007 * Sascha Hauer, Pengutronix * - * (C) Copyright 2009 Freescale Semiconductor, Inc. + * (C) Copyright 2009-2015 Freescale Semiconductor, Inc. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -49,6 +49,8 @@ static inline int gpt_has_clk_source_osc(void) return 1; return 0; +#elif defined(CONFIG_MX7) + return 1; #else return 0; #endif @@ -56,6 +58,9 @@ static inline int gpt_has_clk_source_osc(void) static inline ulong gpt_get_clk(void) { +#if defined(CONFIG_MX7) + return MXC_HCLK >> 3; +#else #ifdef CONFIG_MXC_GPT_HCLK if (gpt_has_clk_source_osc()) return MXC_HCLK >> 3; @@ -64,6 +69,7 @@ static inline ulong gpt_get_clk(void) #else return MXC_CLK32; #endif +#endif } static inline unsigned long long tick_to_time(unsigned long long tick) { @@ -106,7 +112,8 @@ int timer_init(void) /* For DL/S, SX, set 24Mhz OSC Enable bit and prescaler */ if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO) || - is_cpu_type(MXC_CPU_MX6SX)) { + is_cpu_type(MXC_CPU_MX6SX) || + is_cpu_type(MXC_CPU_MX7D)) { i |= GPTCR_24MEN; /* Produce 3Mhz clock */ |