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authorChin Liang See <clsee@altera.com>2014-06-10 01:11:04 -0500
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-07-05 00:24:18 +0200
commit05b884b5cd56478ba617b5c6a0538efe590fe098 (patch)
tree1c3b2e2fca02760cba269f7af7be8968c010f96c /arch
parentd8c67dc6e1f861bcf6e61c0b67782fbac2e0a010 (diff)
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socfpga: Adding DesignWare watchdog support
To enable the DesignWare watchdog support at SOCFPGA Cyclone V dev kit. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
index f564046..f2ecbbd 100644
--- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
+++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
@@ -11,6 +11,7 @@
#define SOCFPGA_UART0_ADDRESS 0xffc02000
#define SOCFPGA_UART1_ADDRESS 0xffc03000
#define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
+#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
#define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000