diff options
author | Allen Martin <amartin@nvidia.com> | 2012-08-31 08:30:00 +0000 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 14:58:21 +0200 |
commit | 00a2749d7be5b0e6cb6435187ec8fea600b44627 (patch) | |
tree | 3d3107a9b369a09ba5c40abff80d23788939b48d /arch | |
parent | 0d04f34a357d004364b58159b64aad354e65137e (diff) | |
download | u-boot-imx-00a2749d7be5b0e6cb6435187ec8fea600b44627.zip u-boot-imx-00a2749d7be5b0e6cb6435187ec8fea600b44627.tar.gz u-boot-imx-00a2749d7be5b0e6cb6435187ec8fea600b44627.tar.bz2 |
tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/armv7/start.S | 8 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/Makefile (renamed from arch/arm/cpu/armv7/tegra2/Makefile) | 8 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/ap20.c (renamed from arch/arm/cpu/armv7/tegra2/ap20.c) | 22 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/board.c (renamed from arch/arm/cpu/armv7/tegra2/board.c) | 18 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/clock.c (renamed from arch/arm/cpu/armv7/tegra2/clock.c) | 10 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/cmd_enterrcm.c (renamed from arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c) | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/config.mk (renamed from arch/arm/cpu/armv7/tegra2/config.mk) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/crypto.c (renamed from arch/arm/cpu/armv7/tegra2/crypto.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/crypto.h (renamed from arch/arm/cpu/armv7/tegra2/crypto.h) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/emc.c (renamed from arch/arm/cpu/armv7/tegra2/emc.c) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/funcmux.c (renamed from arch/arm/cpu/armv7/tegra2/funcmux.c) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/lowlevel_init.S (renamed from arch/arm/cpu/armv7/tegra2/lowlevel_init.S) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/pinmux.c (renamed from arch/arm/cpu/armv7/tegra2/pinmux.c) | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/pmu.c (renamed from arch/arm/cpu/armv7/tegra2/pmu.c) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/sys_info.c (renamed from arch/arm/cpu/armv7/tegra2/sys_info.c) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/timer.c (renamed from arch/arm/cpu/armv7/tegra2/timer.c) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/usb.c (renamed from arch/arm/cpu/armv7/tegra2/usb.c) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/warmboot.c (renamed from arch/arm/cpu/armv7/tegra2/warmboot.c) | 18 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/warmboot_avp.c (renamed from arch/arm/cpu/armv7/tegra2/warmboot_avp.c) | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra20/warmboot_avp.h (renamed from arch/arm/cpu/armv7/tegra2/warmboot_avp.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/ap20.h (renamed from arch/arm/include/asm/arch-tegra2/ap20.h) | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/apb_misc.h (renamed from arch/arm/include/asm/arch-tegra2/apb_misc.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/board.h (renamed from arch/arm/include/asm/arch-tegra2/board.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/clk_rst.h (renamed from arch/arm/include/asm/arch-tegra2/clk_rst.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/clock.h (renamed from arch/arm/include/asm/arch-tegra2/clock.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/emc.h (renamed from arch/arm/include/asm/arch-tegra2/emc.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/flow.h (renamed from arch/arm/include/asm/arch-tegra2/flow.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/funcmux.h (renamed from arch/arm/include/asm/arch-tegra2/funcmux.h) | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/fuse.h (renamed from arch/arm/include/asm/arch-tegra2/fuse.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/gp_padctrl.h (renamed from arch/arm/include/asm/arch-tegra2/gp_padctrl.h) | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/gpio.h (renamed from arch/arm/include/asm/arch-tegra2/gpio.h) | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/mmc.h (renamed from arch/arm/include/asm/arch-tegra2/mmc.h) | 8 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/pinmux.h (renamed from arch/arm/include/asm/arch-tegra2/pinmux.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/pmc.h (renamed from arch/arm/include/asm/arch-tegra2/pmc.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/pmu.h (renamed from arch/arm/include/asm/arch-tegra2/pmu.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/scu.h (renamed from arch/arm/include/asm/arch-tegra2/scu.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/sdram_param.h (renamed from arch/arm/include/asm/arch-tegra2/sdram_param.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/sys_proto.h (renamed from arch/arm/include/asm/arch-tegra2/sys_proto.h) | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/tegra20.h (renamed from arch/arm/include/asm/arch-tegra2/tegra2.h) | 18 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/tegra_i2c.h (renamed from arch/arm/include/asm/arch-tegra2/tegra_i2c.h) | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/tegra_spi.h (renamed from arch/arm/include/asm/arch-tegra2/tegra_spi.h) | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/timer.h (renamed from arch/arm/include/asm/arch-tegra2/timer.h) | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/uart-spi-switch.h (renamed from arch/arm/include/asm/arch-tegra2/uart-spi-switch.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/uart.h (renamed from arch/arm/include/asm/arch-tegra2/uart.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/usb.h (renamed from arch/arm/include/asm/arch-tegra2/usb.h) | 0 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-tegra20/warmboot.h (renamed from arch/arm/include/asm/arch-tegra2/warmboot.h) | 0 |
46 files changed, 81 insertions, 81 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index aee27fd..38cce93 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -133,7 +133,7 @@ reset: orr r0, r0, #0xd3 msr cpsr,r0 -#if !defined(CONFIG_TEGRA2) +#if !defined(CONFIG_TEGRA20) /* * Setup vector: * (OMAP4 spl TEXT_BASE is not 32 byte aligned. @@ -149,7 +149,7 @@ reset: ldr r0, =_start mcr p15, 0, r0, c12, c0, 0 @Set VBAR #endif -#endif /* !Tegra2 */ +#endif /* !Tegra20 */ /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT @@ -282,14 +282,14 @@ jump_2_ram: /* * Move vector table */ -#if !defined(CONFIG_TEGRA2) +#if !defined(CONFIG_TEGRA20) #if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) /* Set vector address in CP15 VBAR register */ ldr r0, =_start add r0, r0, r9 mcr p15, 0, r0, c12, c0, 0 @Set VBAR #endif -#endif /* !Tegra2 */ +#endif /* !Tegra20 */ ldr r0, _board_init_r_ofs adr r1, _start diff --git a/arch/arm/cpu/armv7/tegra2/Makefile b/arch/arm/cpu/armv7/tegra20/Makefile index 80da453..da62646 100644 --- a/arch/arm/cpu/armv7/tegra2/Makefile +++ b/arch/arm/cpu/armv7/tegra20/Makefile @@ -25,9 +25,9 @@ # The AVP is ARMv4T architecture so we must use special compiler # flags for any startup files it might use. -CFLAGS_arch/arm/cpu/armv7/tegra2/ap20.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/clock.o += -march=armv4t -CFLAGS_arch/arm/cpu/armv7/tegra2/warmboot_avp.o += -march=armv4t +CFLAGS_arch/arm/cpu/armv7/tegra20/ap20.o += -march=armv4t +CFLAGS_arch/arm/cpu/armv7/tegra20/clock.o += -march=armv4t +CFLAGS_arch/arm/cpu/armv7/tegra20/warmboot_avp.o += -march=armv4t include $(TOPDIR)/config.mk @@ -38,7 +38,7 @@ COBJS-y := ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o COBJS-$(CONFIG_TEGRA_PMU) += pmu.o COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o -COBJS-$(CONFIG_TEGRA2_LP0) += crypto.o warmboot.o warmboot_avp.o +COBJS-$(CONFIG_TEGRA20_LP0) += crypto.o warmboot.o warmboot_avp.o COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o COBJS := $(COBJS-y) diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra20/ap20.c index 1aad387..8b6afbc 100644 --- a/arch/arm/cpu/armv7/tegra2/ap20.c +++ b/arch/arm/cpu/armv7/tegra20/ap20.c @@ -22,7 +22,7 @@ */ #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/ap20.h> #include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> @@ -37,7 +37,7 @@ int tegra_get_chip_type(void) { struct apb_misc_gp_ctlr *gp; - struct fuse_regs *fuse = (struct fuse_regs *)TEGRA2_FUSE_BASE; + struct fuse_regs *fuse = (struct fuse_regs *)TEGRA20_FUSE_BASE; uint tegra_sku_id, rev; /* @@ -45,13 +45,13 @@ int tegra_get_chip_type(void) * APB_MISC + 0x804, and has value 0x20 for Tegra20, 0x30 for * Tegra30 */ - gp = (struct apb_misc_gp_ctlr *)TEGRA2_APB_MISC_GP_BASE; + gp = (struct apb_misc_gp_ctlr *)TEGRA20_APB_MISC_GP_BASE; rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT; tegra_sku_id = readl(&fuse->sku_info) & 0xff; switch (rev) { - case CHIPID_TEGRA2: + case CHIPID_TEGRA20: switch (tegra_sku_id) { case SKU_ID_T20: return TEGRA_SOC_T20; @@ -144,14 +144,14 @@ static void enable_cpu_clock(int enable) static int is_cpu_powered(void) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; return (readl(&pmc->pmc_pwrgate_status) & CPU_PWRED) ? 1 : 0; } static void remove_cpu_io_clamps(void) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 reg; /* Remove the clamps on the CPU I/O signals */ @@ -165,7 +165,7 @@ static void remove_cpu_io_clamps(void) static void powerup_cpu(void) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 reg; int timeout = IO_STABILIZATION_DELAY; @@ -196,7 +196,7 @@ static void powerup_cpu(void) static void enable_cpu_power_rail(void) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 reg; reg = readl(&pmc->pmc_cntrl); @@ -334,7 +334,7 @@ static u32 get_odmdata(void) void init_pmc_scratch(void) { - struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 odmdata; int i; @@ -346,13 +346,13 @@ void init_pmc_scratch(void) odmdata = get_odmdata(); writel(odmdata, &pmc->pmc_scratch20); -#ifdef CONFIG_TEGRA2_LP0 +#ifdef CONFIG_TEGRA20_LP0 /* save Sdram params to PMC 2, 4, and 24 for WB0 */ warmboot_save_sdram_params(); #endif } -void tegra2_start(void) +void tegra20_start(void) { struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE; diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra20/board.c index 923678d..e595ff9 100644 --- a/arch/arm/cpu/armv7/tegra2/board.c +++ b/arch/arm/cpu/armv7/tegra20/board.c @@ -28,7 +28,7 @@ #include <asm/arch/funcmux.h> #include <asm/arch/pmc.h> #include <asm/arch/sys_proto.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> DECLARE_GLOBAL_DATA_PTR; @@ -47,7 +47,7 @@ enum { unsigned int query_sdram_size(void) { - struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; u32 reg; reg = readl(&pmc->pmc_scratch20); @@ -89,7 +89,7 @@ int checkboard(void) int arch_cpu_init(void) { /* Fire up the Cortex A9 */ - tegra2_start(); + tegra20_start(); /* We didn't do this init in start.S, so do it now */ cpu_init_cp15(); @@ -102,11 +102,11 @@ int arch_cpu_init(void) #endif static int uart_configs[] = { -#if defined(CONFIG_TEGRA2_UARTA_UAA_UAB) +#if defined(CONFIG_TEGRA20_UARTA_UAA_UAB) FUNCMUX_UART1_UAA_UAB, -#elif defined(CONFIG_TEGRA2_UARTA_GPU) +#elif defined(CONFIG_TEGRA20_UARTA_GPU) FUNCMUX_UART1_GPU, -#elif defined(CONFIG_TEGRA2_UARTA_SDIO1) +#elif defined(CONFIG_TEGRA20_UARTA_SDIO1) FUNCMUX_UART1_SDIO1, #else FUNCMUX_UART1_IRRX_IRTX, @@ -146,13 +146,13 @@ void board_init_uart_f(void) { int uart_ids = 0; /* bit mask of which UART ids to enable */ -#ifdef CONFIG_TEGRA2_ENABLE_UARTA +#ifdef CONFIG_TEGRA20_ENABLE_UARTA uart_ids |= UARTA; #endif -#ifdef CONFIG_TEGRA2_ENABLE_UARTB +#ifdef CONFIG_TEGRA20_ENABLE_UARTB uart_ids |= UARTB; #endif -#ifdef CONFIG_TEGRA2_ENABLE_UARTD +#ifdef CONFIG_TEGRA20_ENABLE_UARTD uart_ids |= UARTD; #endif setup_uarts(uart_ids); diff --git a/arch/arm/cpu/armv7/tegra2/clock.c b/arch/arm/cpu/armv7/tegra20/clock.c index 602589c..2403874 100644 --- a/arch/arm/cpu/armv7/tegra2/clock.c +++ b/arch/arm/cpu/armv7/tegra20/clock.c @@ -19,13 +19,13 @@ * MA 02111-1307 USA */ -/* Tegra2 Clock control functions */ +/* Tegra20 Clock control functions */ #include <asm/io.h> #include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/timer.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <common.h> #include <div64.h> #include <fdtdec.h> @@ -49,7 +49,7 @@ static unsigned osc_freq[CLOCK_OSC_FREQ_COUNT] = { }; /* - * Clock types that we can use as a source. The Tegra2 has muxes for the + * Clock types that we can use as a source. The Tegra20 has muxes for the * peripheral clocks, and in most cases there are four options for the clock * source. This gives us a clock 'type' and exploits what commonality exists * in the device. @@ -848,7 +848,7 @@ void reset_cmplx_set_enable(int cpu, int which, int reset) (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; u32 mask; - /* Form the mask, which depends on the cpu chosen. Tegra2 has 2 */ + /* Form the mask, which depends on the cpu chosen. Tegra20 has 2 */ assert(cpu >= 0 && cpu < 2); mask = which << cpu; @@ -976,7 +976,7 @@ void clock_ll_start_uart(enum periph_id periph_id) * the same but we are very cautious so we check that a valid clock ID is * provided. * - * @param clk_id Clock ID according to tegra2 device tree binding + * @param clk_id Clock ID according to tegra20 device tree binding * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid */ static enum periph_id clk_id_to_periph_id(int clk_id) diff --git a/arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c b/arch/arm/cpu/armv7/tegra20/cmd_enterrcm.c index 2fcd107..75cadb0 100644 --- a/arch/arm/cpu/armv7/tegra2/cmd_enterrcm.c +++ b/arch/arm/cpu/armv7/tegra20/cmd_enterrcm.c @@ -40,13 +40,13 @@ */ #include <common.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/pmc.h> static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; puts("Entering RCM...\n"); udelay(50000); diff --git a/arch/arm/cpu/armv7/tegra2/config.mk b/arch/arm/cpu/armv7/tegra20/config.mk index 4dd8cb8..714daaf 100644 --- a/arch/arm/cpu/armv7/tegra2/config.mk +++ b/arch/arm/cpu/armv7/tegra20/config.mk @@ -26,7 +26,7 @@ # Tegra has an ARMv4T CPU which runs board_init_f(), so we must build these # files with compatible flags -ifdef CONFIG_TEGRA2 +ifdef CONFIG_TEGRA20 CFLAGS_arch/arm/lib/board.o += -march=armv4t CFLAGS_arch/arm/lib/memset.o += -march=armv4t CFLAGS_lib/string.o += -march=armv4t diff --git a/arch/arm/cpu/armv7/tegra2/crypto.c b/arch/arm/cpu/armv7/tegra20/crypto.c index 5f0b240..5f0b240 100644 --- a/arch/arm/cpu/armv7/tegra2/crypto.c +++ b/arch/arm/cpu/armv7/tegra20/crypto.c diff --git a/arch/arm/cpu/armv7/tegra2/crypto.h b/arch/arm/cpu/armv7/tegra20/crypto.h index aff67e7..aff67e7 100644 --- a/arch/arm/cpu/armv7/tegra2/crypto.h +++ b/arch/arm/cpu/armv7/tegra20/crypto.h diff --git a/arch/arm/cpu/armv7/tegra2/emc.c b/arch/arm/cpu/armv7/tegra20/emc.c index c0e5c56..ffc05e4 100644 --- a/arch/arm/cpu/armv7/tegra2/emc.c +++ b/arch/arm/cpu/armv7/tegra20/emc.c @@ -27,7 +27,7 @@ #include <asm/arch/apb_misc.h> #include <asm/arch/clock.h> #include <asm/arch/emc.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> /* * The EMC registers have shadow registers. When the EMC clock is updated diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra20/funcmux.c index 4a31a4c..8cfed64 100644 --- a/arch/arm/cpu/armv7/tegra2/funcmux.c +++ b/arch/arm/cpu/armv7/tegra20/funcmux.c @@ -19,7 +19,7 @@ * MA 02111-1307 USA */ -/* Tegra2 high-level function multiplexing */ +/* Tegra20 high-level function multiplexing */ #include <common.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S b/arch/arm/cpu/armv7/tegra20/lowlevel_init.S index d117f23..d117f23 100644 --- a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S +++ b/arch/arm/cpu/armv7/tegra20/lowlevel_init.S diff --git a/arch/arm/cpu/armv7/tegra2/pinmux.c b/arch/arm/cpu/armv7/tegra20/pinmux.c index b053f90..70e84df 100644 --- a/arch/arm/cpu/armv7/tegra2/pinmux.c +++ b/arch/arm/cpu/armv7/tegra20/pinmux.c @@ -19,10 +19,10 @@ * MA 02111-1307 USA */ -/* Tegra2 pin multiplexing functions */ +/* Tegra20 pin multiplexing functions */ #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/pinmux.h> #include <common.h> diff --git a/arch/arm/cpu/armv7/tegra2/pmu.c b/arch/arm/cpu/armv7/tegra20/pmu.c index 4673802..53505e9 100644 --- a/arch/arm/cpu/armv7/tegra2/pmu.c +++ b/arch/arm/cpu/armv7/tegra20/pmu.c @@ -25,7 +25,7 @@ #include <tps6586x.h> #include <asm/io.h> #include <asm/arch/ap20.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/tegra_i2c.h> #include <asm/arch/sys_proto.h> diff --git a/arch/arm/cpu/armv7/tegra2/sys_info.c b/arch/arm/cpu/armv7/tegra20/sys_info.c index 6d11dc1..1a0bb56 100644 --- a/arch/arm/cpu/armv7/tegra2/sys_info.c +++ b/arch/arm/cpu/armv7/tegra20/sys_info.c @@ -27,7 +27,7 @@ /* Print CPU information */ int print_cpuinfo(void) { - puts("TEGRA2\n"); + puts("TEGRA20\n"); /* TBD: Add printf of major/minor rev info, stepping, etc. */ return 0; diff --git a/arch/arm/cpu/armv7/tegra2/timer.c b/arch/arm/cpu/armv7/tegra20/timer.c index b12b12c..562e414 100644 --- a/arch/arm/cpu/armv7/tegra2/timer.c +++ b/arch/arm/cpu/armv7/tegra20/timer.c @@ -37,7 +37,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/timer.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/cpu/armv7/tegra2/usb.c b/arch/arm/cpu/armv7/tegra20/usb.c index 5f2b243..178bb13 100644 --- a/arch/arm/cpu/armv7/tegra2/usb.c +++ b/arch/arm/cpu/armv7/tegra20/usb.c @@ -24,7 +24,7 @@ #include <common.h> #include <asm/io.h> #include <asm-generic/gpio.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/gpio.h> diff --git a/arch/arm/cpu/armv7/tegra2/warmboot.c b/arch/arm/cpu/armv7/tegra20/warmboot.c index 25d8968..809ea01 100644 --- a/arch/arm/cpu/armv7/tegra2/warmboot.c +++ b/arch/arm/cpu/armv7/tegra20/warmboot.c @@ -29,7 +29,7 @@ #include <asm/arch/clock.h> #include <asm/arch/pmc.h> #include <asm/arch/pinmux.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/fuse.h> #include <asm/arch/emc.h> #include <asm/arch/gp_padctrl.h> @@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_TEGRA_CLOCK_SCALING -#error "You must enable CONFIG_TEGRA_CLOCK_SCALING to use CONFIG_TEGRA2_LP0" +#error "You must enable CONFIG_TEGRA_CLOCK_SCALING to use CONFIG_TEGRA20_LP0" #endif /* @@ -139,9 +139,9 @@ int warmboot_save_sdram_params(void) u32 ram_code; struct sdram_params sdram; struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE; - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; struct apb_misc_gp_ctlr *gp = - (struct apb_misc_gp_ctlr *)TEGRA2_APB_MISC_GP_BASE; + (struct apb_misc_gp_ctlr *)TEGRA20_APB_MISC_GP_BASE; struct emc_ctlr *emc = emc_get_controller(gd->fdt_blob); union scratch2_reg scratch2; union scratch4_reg scratch4; @@ -205,7 +205,7 @@ static u32 get_major_version(void) { u32 major_id; struct apb_misc_gp_ctlr *gp = - (struct apb_misc_gp_ctlr *)TEGRA2_APB_MISC_GP_BASE; + (struct apb_misc_gp_ctlr *)TEGRA20_APB_MISC_GP_BASE; major_id = (readl(&gp->hidrev) & HIDREV_MAJORPREV_MASK) >> HIDREV_MAJORPREV_SHIFT; @@ -229,7 +229,7 @@ static int is_failure_analysis_mode(struct fuse_regs *fuse) static int ap20_is_odm_production_mode(void) { - struct fuse_regs *fuse = (struct fuse_regs *)TEGRA2_FUSE_BASE; + struct fuse_regs *fuse = (struct fuse_regs *)TEGRA20_FUSE_BASE; if (!is_failure_analysis_mode(fuse) && is_odm_production_mode_fuse_set(fuse)) @@ -240,7 +240,7 @@ static int ap20_is_odm_production_mode(void) static int ap20_is_production_mode(void) { - struct fuse_regs *fuse = (struct fuse_regs *)TEGRA2_FUSE_BASE; + struct fuse_regs *fuse = (struct fuse_regs *)TEGRA20_FUSE_BASE; if (get_major_version() == 0) return 1; @@ -257,11 +257,11 @@ static enum fuse_operating_mode fuse_get_operation_mode(void) { u32 chip_id; struct apb_misc_gp_ctlr *gp = - (struct apb_misc_gp_ctlr *)TEGRA2_APB_MISC_GP_BASE; + (struct apb_misc_gp_ctlr *)TEGRA20_APB_MISC_GP_BASE; chip_id = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT; - if (chip_id == CHIPID_TEGRA2) { + if (chip_id == CHIPID_TEGRA20) { if (ap20_is_odm_production_mode()) { printf("!! odm_production_mode is not supported !!\n"); return MODE_UNDEFINED; diff --git a/arch/arm/cpu/armv7/tegra2/warmboot_avp.c b/arch/arm/cpu/armv7/tegra20/warmboot_avp.c index 70bcd8e..cd01908 100644 --- a/arch/arm/cpu/armv7/tegra2/warmboot_avp.c +++ b/arch/arm/cpu/armv7/tegra20/warmboot_avp.c @@ -29,7 +29,7 @@ #include <asm/arch/flow.h> #include <asm/arch/pinmux.h> #include <asm/arch/pmc.h> -#include <asm/arch/tegra2.h> +#include <asm/arch/tegra20.h> #include <asm/arch/warmboot.h> #include "warmboot_avp.h" @@ -38,7 +38,7 @@ void wb_start(void) { struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE; - struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; + struct pmc_ctlr *pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; diff --git a/arch/arm/cpu/armv7/tegra2/warmboot_avp.h b/arch/arm/cpu/armv7/tegra20/warmboot_avp.h index 4b71c07..4b71c07 100644 --- a/arch/arm/cpu/armv7/tegra2/warmboot_avp.h +++ b/arch/arm/cpu/armv7/tegra20/warmboot_avp.h diff --git a/arch/arm/include/asm/arch-tegra2/ap20.h b/arch/arm/include/asm/arch-tegra20/ap20.h index d222c44..c84d22f 100644 --- a/arch/arm/include/asm/arch-tegra2/ap20.h +++ b/arch/arm/include/asm/arch-tegra20/ap20.h @@ -95,8 +95,8 @@ #define HALT_COP_EVENT_IRQ_1 (1 << 11) #define HALT_COP_EVENT_FIQ_1 (1 << 9) -/* Start up the tegra2 SOC */ -void tegra2_start(void); +/* Start up the tegra20 SOC */ +void tegra20_start(void); /* This is the main entry into U-Boot, used by the Cortex-A9 */ extern void _start(void); diff --git a/arch/arm/include/asm/arch-tegra2/apb_misc.h b/arch/arm/include/asm/arch-tegra20/apb_misc.h index eb69d18..eb69d18 100644 --- a/arch/arm/include/asm/arch-tegra2/apb_misc.h +++ b/arch/arm/include/asm/arch-tegra20/apb_misc.h diff --git a/arch/arm/include/asm/arch-tegra2/board.h b/arch/arm/include/asm/arch-tegra20/board.h index a90d36c..a90d36c 100644 --- a/arch/arm/include/asm/arch-tegra2/board.h +++ b/arch/arm/include/asm/arch-tegra20/board.h diff --git a/arch/arm/include/asm/arch-tegra2/clk_rst.h b/arch/arm/include/asm/arch-tegra20/clk_rst.h index 8c3be91..8c3be91 100644 --- a/arch/arm/include/asm/arch-tegra2/clk_rst.h +++ b/arch/arm/include/asm/arch-tegra20/clk_rst.h diff --git a/arch/arm/include/asm/arch-tegra2/clock.h b/arch/arm/include/asm/arch-tegra20/clock.h index ff83bbf..ff83bbf 100644 --- a/arch/arm/include/asm/arch-tegra2/clock.h +++ b/arch/arm/include/asm/arch-tegra20/clock.h diff --git a/arch/arm/include/asm/arch-tegra2/emc.h b/arch/arm/include/asm/arch-tegra20/emc.h index deb3d36..deb3d36 100644 --- a/arch/arm/include/asm/arch-tegra2/emc.h +++ b/arch/arm/include/asm/arch-tegra20/emc.h diff --git a/arch/arm/include/asm/arch-tegra2/flow.h b/arch/arm/include/asm/arch-tegra20/flow.h index cce6cbf..cce6cbf 100644 --- a/arch/arm/include/asm/arch-tegra2/flow.h +++ b/arch/arm/include/asm/arch-tegra20/flow.h diff --git a/arch/arm/include/asm/arch-tegra2/funcmux.h b/arch/arm/include/asm/arch-tegra20/funcmux.h index dcd512f..258f7b6 100644 --- a/arch/arm/include/asm/arch-tegra2/funcmux.h +++ b/arch/arm/include/asm/arch-tegra20/funcmux.h @@ -19,7 +19,7 @@ * MA 02111-1307 USA */ -/* Tegra2 high-level function multiplexing */ +/* Tegra20 high-level function multiplexing */ #ifndef __FUNCMUX_H #define __FUNCMUX_H diff --git a/arch/arm/include/asm/arch-tegra2/fuse.h b/arch/arm/include/asm/arch-tegra20/fuse.h index b7e3808..b7e3808 100644 --- a/arch/arm/include/asm/arch-tegra2/fuse.h +++ b/arch/arm/include/asm/arch-tegra20/fuse.h diff --git a/arch/arm/include/asm/arch-tegra2/gp_padctrl.h b/arch/arm/include/asm/arch-tegra20/gp_padctrl.h index 1755ab2..865af5b 100644 --- a/arch/arm/include/asm/arch-tegra2/gp_padctrl.h +++ b/arch/arm/include/asm/arch-tegra20/gp_padctrl.h @@ -68,6 +68,6 @@ struct apb_misc_gp_ctlr { #define HIDREV_MAJORPREV_MASK (0xf << HIDREV_MAJORPREV_SHIFT) /* CHIPID field returned from APB_MISC_GP_HIDREV register */ -#define CHIPID_TEGRA2 0x20 +#define CHIPID_TEGRA20 0x20 #endif diff --git a/arch/arm/include/asm/arch-tegra2/gpio.h b/arch/arm/include/asm/arch-tegra20/gpio.h index 40ddb02..06be4c2 100644 --- a/arch/arm/include/asm/arch-tegra2/gpio.h +++ b/arch/arm/include/asm/arch-tegra20/gpio.h @@ -281,7 +281,7 @@ enum gpio_pin { }; /* - * Tegra2-specific GPIO API + * Tegra20-specific GPIO API */ void gpio_info(void); diff --git a/arch/arm/include/asm/arch-tegra2/mmc.h b/arch/arm/include/asm/arch-tegra20/mmc.h index c1f12db..916a353 100644 --- a/arch/arm/include/asm/arch-tegra2/mmc.h +++ b/arch/arm/include/asm/arch-tegra20/mmc.h @@ -19,9 +19,9 @@ * MA 02111-1307 USA */ -#ifndef _TEGRA2_MMC_H_ -#define _TEGRA2_MMC_H_ +#ifndef _TEGRA20_MMC_H_ +#define _TEGRA20_MMC_H_ -int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio); +int tegra20_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio); -#endif /* TEGRA2_MMC_H_ */ +#endif /* TEGRA20_MMC_H_ */ diff --git a/arch/arm/include/asm/arch-tegra2/pinmux.h b/arch/arm/include/asm/arch-tegra20/pinmux.h index 03fa7ca..03fa7ca 100644 --- a/arch/arm/include/asm/arch-tegra2/pinmux.h +++ b/arch/arm/include/asm/arch-tegra20/pinmux.h diff --git a/arch/arm/include/asm/arch-tegra2/pmc.h b/arch/arm/include/asm/arch-tegra20/pmc.h index b1d47cd..b1d47cd 100644 --- a/arch/arm/include/asm/arch-tegra2/pmc.h +++ b/arch/arm/include/asm/arch-tegra20/pmc.h diff --git a/arch/arm/include/asm/arch-tegra2/pmu.h b/arch/arm/include/asm/arch-tegra20/pmu.h index 390815f..390815f 100644 --- a/arch/arm/include/asm/arch-tegra2/pmu.h +++ b/arch/arm/include/asm/arch-tegra20/pmu.h diff --git a/arch/arm/include/asm/arch-tegra2/scu.h b/arch/arm/include/asm/arch-tegra20/scu.h index 787ded0..787ded0 100644 --- a/arch/arm/include/asm/arch-tegra2/scu.h +++ b/arch/arm/include/asm/arch-tegra20/scu.h diff --git a/arch/arm/include/asm/arch-tegra2/sdram_param.h b/arch/arm/include/asm/arch-tegra20/sdram_param.h index 6c427d0..6c427d0 100644 --- a/arch/arm/include/asm/arch-tegra2/sdram_param.h +++ b/arch/arm/include/asm/arch-tegra20/sdram_param.h diff --git a/arch/arm/include/asm/arch-tegra2/sys_proto.h b/arch/arm/include/asm/arch-tegra20/sys_proto.h index c11534e..643d542 100644 --- a/arch/arm/include/asm/arch-tegra2/sys_proto.h +++ b/arch/arm/include/asm/arch-tegra20/sys_proto.h @@ -24,12 +24,12 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_ -struct tegra2_sysinfo { +struct tegra20_sysinfo { char *board_string; }; void invalidate_dcache(void); -extern const struct tegra2_sysinfo sysinfo; +extern const struct tegra20_sysinfo sysinfo; #endif diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h b/arch/arm/include/asm/arch-tegra20/tegra20.h index 13d68c0..6750754 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra2.h +++ b/arch/arm/include/asm/arch-tegra20/tegra20.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */ -#ifndef _TEGRA2_H_ -#define _TEGRA2_H_ +#ifndef _TEGRA20_H_ +#define _TEGRA20_H_ #define NV_PA_SDRAM_BASE 0x00000000 #define NV_PA_ARM_PERIPHBASE 0x50040000 @@ -33,21 +33,21 @@ #define NV_PA_GPIO_BASE 0x6000D000 #define NV_PA_EVP_BASE 0x6000F000 #define NV_PA_APB_MISC_BASE 0x70000000 -#define TEGRA2_APB_MISC_GP_BASE (NV_PA_APB_MISC_BASE + 0x0800) +#define TEGRA20_APB_MISC_GP_BASE (NV_PA_APB_MISC_BASE + 0x0800) #define NV_PA_APB_UARTA_BASE (NV_PA_APB_MISC_BASE + 0x6000) #define NV_PA_APB_UARTB_BASE (NV_PA_APB_MISC_BASE + 0x6040) #define NV_PA_APB_UARTC_BASE (NV_PA_APB_MISC_BASE + 0x6200) #define NV_PA_APB_UARTD_BASE (NV_PA_APB_MISC_BASE + 0x6300) #define NV_PA_APB_UARTE_BASE (NV_PA_APB_MISC_BASE + 0x6400) -#define TEGRA2_SPI_BASE (NV_PA_APB_MISC_BASE + 0xC380) -#define TEGRA2_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) -#define TEGRA2_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) +#define TEGRA20_SPI_BASE (NV_PA_APB_MISC_BASE + 0xC380) +#define TEGRA20_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) +#define TEGRA20_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) #define NV_PA_CSITE_BASE 0x70040000 #define TEGRA_USB1_BASE 0xC5000000 #define TEGRA_USB3_BASE 0xC5008000 #define TEGRA_USB_ADDR_MASK 0xFFFFC000 -#define TEGRA2_SDRC_CS0 NV_PA_SDRAM_BASE +#define TEGRA20_SDRC_CS0 NV_PA_SDRAM_BASE #define LOW_LEVEL_SRAM_STACK 0x4000FFFC #define EARLY_AVP_STACK (NV_PA_SDRAM_BASE + 0x20000) #define EARLY_CPU_STACK (EARLY_AVP_STACK - 4096) @@ -85,7 +85,7 @@ enum { }; #else /* __ASSEMBLY__ */ -#define PRM_RSTCTRL TEGRA2_PMC_BASE +#define PRM_RSTCTRL TEGRA20_PMC_BASE #endif -#endif /* TEGRA2_H */ +#endif /* TEGRA20_H */ diff --git a/arch/arm/include/asm/arch-tegra2/tegra_i2c.h b/arch/arm/include/asm/arch-tegra20/tegra_i2c.h index cfb136c..6abfe4e 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra_i2c.h +++ b/arch/arm/include/asm/arch-tegra20/tegra_i2c.h @@ -1,5 +1,5 @@ /* - * NVIDIA Tegra2 I2C controller + * NVIDIA Tegra20 I2C controller * * Copyright 2010-2011 NVIDIA Corporation * diff --git a/arch/arm/include/asm/arch-tegra2/tegra_spi.h b/arch/arm/include/asm/arch-tegra20/tegra_spi.h index 892d90c..8978bea 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra_spi.h +++ b/arch/arm/include/asm/arch-tegra20/tegra_spi.h @@ -1,5 +1,5 @@ /* - * NVIDIA Tegra2 SPI-FLASH controller + * NVIDIA Tegra20 SPI-FLASH controller * * Copyright 2010-2012 NVIDIA Corporation * @@ -70,6 +70,6 @@ struct spi_tegra { #define SPI_STAT_CUR_BLKCNT (1 << 15) #define SPI_TIMEOUT 1000 -#define TEGRA2_SPI_MAX_FREQ 52000000 +#define TEGRA20_SPI_MAX_FREQ 52000000 #endif /* _TEGRA_SPI_H_ */ diff --git a/arch/arm/include/asm/arch-tegra2/timer.h b/arch/arm/include/asm/arch-tegra20/timer.h index adefa2c..43f7ab4 100644 --- a/arch/arm/include/asm/arch-tegra2/timer.h +++ b/arch/arm/include/asm/arch-tegra20/timer.h @@ -19,10 +19,10 @@ * MA 02111-1307 USA */ -/* Tegra2 timer functions */ +/* Tegra20 timer functions */ -#ifndef _TEGRA2_TIMER_H -#define _TEGRA2_TIMER_H +#ifndef _TEGRA20_TIMER_H +#define _TEGRA20_TIMER_H /* returns the current monotonic timer value in microseconds */ unsigned long timer_get_us(void); diff --git a/arch/arm/include/asm/arch-tegra2/uart-spi-switch.h b/arch/arm/include/asm/arch-tegra20/uart-spi-switch.h index 82ac180..82ac180 100644 --- a/arch/arm/include/asm/arch-tegra2/uart-spi-switch.h +++ b/arch/arm/include/asm/arch-tegra20/uart-spi-switch.h diff --git a/arch/arm/include/asm/arch-tegra2/uart.h b/arch/arm/include/asm/arch-tegra20/uart.h index aea29a7..aea29a7 100644 --- a/arch/arm/include/asm/arch-tegra2/uart.h +++ b/arch/arm/include/asm/arch-tegra20/uart.h diff --git a/arch/arm/include/asm/arch-tegra2/usb.h b/arch/arm/include/asm/arch-tegra20/usb.h index 638033b..638033b 100644 --- a/arch/arm/include/asm/arch-tegra2/usb.h +++ b/arch/arm/include/asm/arch-tegra20/usb.h diff --git a/arch/arm/include/asm/arch-tegra2/warmboot.h b/arch/arm/include/asm/arch-tegra20/warmboot.h index 99ac2e7..99ac2e7 100644 --- a/arch/arm/include/asm/arch-tegra2/warmboot.h +++ b/arch/arm/include/asm/arch-tegra20/warmboot.h |