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authorYe.Li <B37916@freescale.com>2015-03-03 22:28:48 +0800
committerYe.Li <B37916@freescale.com>2015-03-03 22:56:01 +0800
commitb83bb7b6cf26a4bb8983ae89c284fb4018c89870 (patch)
tree39078d483ec901e42d4095b7af970c17ce3b2d1f /arch
parent58ff1254f912ff674564b997d9c7076ac29ec0f1 (diff)
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MLK-10360 imx: iomux-v3: Fix the driver issue for MUX_CTL with offset 0
The IOMUX-v3 driver checks the MUX_CTL register offset. If the offset is zero, it will skip the MUX_CTL register setting. This behavior is correct for previous platforms like i.MX6, but on i.MX7, the IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00 is at offset 0. Thus, it causes the MUX setting to this pin always not working. This fix removes this condition checking since it is unnecessary. Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/imx-common/iomux-v3.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
index 0bfe474..adc848b 100644
--- a/arch/arm/imx-common/iomux-v3.c
+++ b/arch/arm/imx-common/iomux-v3.c
@@ -39,8 +39,7 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
}
#endif
- if (mux_ctrl_ofs)
- __raw_writel(mux_mode, base + mux_ctrl_ofs);
+ __raw_writel(mux_mode, base + mux_ctrl_ofs);
if (sel_input_ofs)
__raw_writel(sel_input, base + sel_input_ofs);