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| author | Ye.Li <B37916@freescale.com> | 2015-03-09 11:54:27 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2015-03-09 12:08:03 +0800 |
| commit | 07299056426f1f25aab51ab5531c4846d4c7560f (patch) | |
| tree | e6a69b12d15131750caabdb704cb96c8cd156975 /arch | |
| parent | bd706b49161dcf834ef80f1bfc8fa3caac8497ca (diff) | |
| download | u-boot-imx-07299056426f1f25aab51ab5531c4846d4c7560f.zip u-boot-imx-07299056426f1f25aab51ab5531c4846d4c7560f.tar.gz u-boot-imx-07299056426f1f25aab51ab5531c4846d4c7560f.tar.bz2 | |
MLK-10385-1 imx: apbh_dma: Update APBH-DMA for MX7D
Update APBH-DMA driver and head files with definitions for CONFIG_MX7
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/imx-common/dma.h | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/imx-common/regs-apbh.h | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/include/asm/imx-common/dma.h b/arch/arm/include/asm/imx-common/dma.h index d5c1f7f..d38d2bf 100644 --- a/arch/arm/include/asm/imx-common/dma.h +++ b/arch/arm/include/asm/imx-common/dma.h @@ -5,7 +5,7 @@ * on behalf of DENX Software Engineering GmbH * * Based on code from LTIB: - * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2015 Freescale Semiconductor, Inc. All Rights Reserved. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -59,7 +59,7 @@ enum { MXS_DMA_CHANNEL_AHB_APBH_RESERVED1, MXS_MAX_DMA_CHANNELS, }; -#elif defined(CONFIG_MX6) +#elif (defined(CONFIG_MX6) || defined(CONFIG_MX7)) enum { MXS_DMA_CHANNEL_AHB_APBH_GPMI0 = 0, MXS_DMA_CHANNEL_AHB_APBH_GPMI1, diff --git a/arch/arm/include/asm/imx-common/regs-apbh.h b/arch/arm/include/asm/imx-common/regs-apbh.h index ca77436..ec1c5f3 100644 --- a/arch/arm/include/asm/imx-common/regs-apbh.h +++ b/arch/arm/include/asm/imx-common/regs-apbh.h @@ -5,7 +5,7 @@ * on behalf of DENX Software Engineering GmbH * * Based on code from LTIB: - * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008-2015 Freescale Semiconductor, Inc. All Rights Reserved. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -96,7 +96,7 @@ struct mxs_apbh_regs { mxs_reg_32(hw_apbh_version) }; -#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6)) +#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7)) struct mxs_apbh_regs { mxs_reg_32(hw_apbh_ctrl0) mxs_reg_32(hw_apbh_ctrl1) @@ -275,7 +275,7 @@ struct mxs_apbh_regs { #define APBH_CTRL0_CLKGATE_CHANNEL_NAND7 0x0800 #define APBH_CTRL0_CLKGATE_CHANNEL_HSADC 0x1000 #define APBH_CTRL0_CLKGATE_CHANNEL_LCDIF 0x2000 -#elif defined(CONFIG_MX6) +#elif (defined(CONFIG_MX6) || defined(CONFIG_MX7)) #define APBH_CTRL0_CLKGATE_CHANNEL_OFFSET 0 #define APBH_CTRL0_CLKGATE_CHANNEL_NAND0 0x0001 #define APBH_CTRL0_CLKGATE_CHANNEL_NAND1 0x0002 @@ -391,7 +391,7 @@ struct mxs_apbh_regs { #define APBH_CHANNEL_CTRL_FREEZE_CHANNEL_LCDIF 0x2000 #endif -#if defined(CONFIG_MX6) +#if (defined(CONFIG_MX6) || defined(CONFIG_MX7)) #define APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET 16 #endif |