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authorStephan Linz <linz@li-pro.net>2012-02-22 19:12:43 +0100
committerMichal Simek <monstr@monstr.eu>2012-02-23 12:16:04 +0100
commit0f883267a877314f83236a3397c8e0040f8a1129 (patch)
tree1ca45afb7459916a3ddbeca0e8076ae10d922812 /arch
parentb9f0b7305278feba7dc295e58c58f22cfcfe8009 (diff)
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microblaze: avoid interrupt race conditions
The interrupt acknowledge action have to run after the registered interrupt handler. So we have a chance to bear out the corresponding interrupt request in the corresponding controller hardware. With this reordering, we optain a proper interrupt handling for level triggered interrupt sources -- for example the new axi_timer v1.02.a introduced in ISE 13.2. Signed-off-by: Stephan Linz <linz@li-pro.net> Acked-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch')
-rw-r--r--arch/microblaze/cpu/interrupts.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index 5a13211..e7ca859 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -155,8 +155,6 @@ void interrupt_handler (void)
#endif
struct irq_action *act = vecs + irqs;
- intc->iar = mask << irqs;
-
#ifdef DEBUG_INT
printf
("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
@@ -165,6 +163,8 @@ void interrupt_handler (void)
act->handler (act->arg);
act->count++;
+ intc->iar = mask << irqs;
+
#ifdef DEBUG_INT
printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
intc->ier, intc->iar, intc->mer);