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authorAneesh V <aneesh@ti.com>2011-11-21 23:39:00 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-06 23:59:34 +0100
commitcd5847ac3a2d561e9d02926c768fd547f418c24d (patch)
treee2b09c3d7fa04d31eaaf5b889a185bc547092319 /arch
parent8e40852f0d60ab0b1381d43e38b31a6b3bcd6549 (diff)
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omap4460: fix TPS initialization
TPS power IC is controlled using a GPIO (gpio_wk7). This GPIO should be maintained at logic 1 always. As such an internal pull-up on this pin will do the job, driving the GPIO outuput is not needed. This will avoid the need of using GPIO library in SPL and also may save some power. Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/omap-common/clocks-common.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index f64a10b..1e7e20e 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -359,14 +359,6 @@ void do_scale_tps62361(u32 reg, u32 volt_mv)
step = volt_mv - TPS62361_BASE_VOLT_MV;
step /= 10;
- /*
- * Select SET1 in TPS62361:
- * VSEL1 is grounded on board. So the following selects
- * VSEL1 = 0 and VSEL0 = 1
- */
- gpio_direction_output(TPS62361_VSEL0_GPIO, 0);
- gpio_set_value(TPS62361_VSEL0_GPIO, 1);
-
temp = TPS62361_I2C_SLAVE_ADDR |
(reg << PRM_VC_VAL_BYPASS_REGADDR_SHIFT) |
(step << PRM_VC_VAL_BYPASS_DATA_SHIFT) |