summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorStephen Warren <swarren@nvidia.com>2013-03-04 13:29:40 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-03-22 16:45:22 +0100
commitc5d4752c0541ea0af559250bd2bec6556fed6915 (patch)
treec364b86a037f3845d638d3f57e891623f4b3305f /arch
parent131a1e603b3a8438b84b41940bc6a2051a36e087 (diff)
downloadu-boot-imx-c5d4752c0541ea0af559250bd2bec6556fed6915.zip
u-boot-imx-c5d4752c0541ea0af559250bd2bec6556fed6915.tar.gz
u-boot-imx-c5d4752c0541ea0af559250bd2bec6556fed6915.tar.bz2
ARM: implement erratum 716044 workaround
Add common code to enable the workaround for ARM erratum 716044. This will be enabled for Tegra. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/start.S6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index fa5fad1..c0e1849 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -310,6 +310,12 @@ ENTRY(cpu_init_cp15)
#endif
mcr p15, 0, r0, c1, c0, 0
+#ifdef CONFIG_ARM_ERRATA_716044
+ mrc p15, 0, r0, c1, c0, 0 @ read system control register
+ orr r0, r0, #1 << 11 @ set bit #11
+ mcr p15, 0, r0, c1, c0, 0 @ write system control register
+#endif
+
#ifdef CONFIG_ARM_ERRATA_742230
mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
orr r0, r0, #1 << 4 @ set bit #4