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authorNitin Garg <nitin.garg@freescale.com>2014-05-28 15:09:28 -0500
committerNitin Garg <nitin.garg@freescale.com>2014-06-13 10:17:01 -0500
commitb829539252202cefe5ccdc22d304eb3c8856e961 (patch)
tree902ee6fb4c608d9088b3689784d3bb93c4de1ad8 /arch
parent230871db5538f69c101db7d5695c37f282bd641d (diff)
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ENGR00315499-17 ARM:imx6sl:evk Add SPI NOR flash boot and access support
Add BSP codes to support SPI NOR flash read, write and erase by using "sf" command. In addition, add a new configuration "mx6slevk_spinor" for building the uboot that can be booted from SPI NOR flash and stored the environments variables in it. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-mx6/mx6sl_pins.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
index 777e912..90cc965 100644
--- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
@@ -115,5 +115,10 @@ enum {
MX6_PAD_KEY_COL4__USB_USBOTG1_PWR = IOMUX_PAD(0x0484, 0x017C, 6, 0x0000, 0, 0),
MX6_PAD_KEY_COL5__USB_USBOTG2_PWR = IOMUX_PAD(0x0488, 0x0180, 6, 0x0000, 0, 0),
+
+ MX6_PAD_ECSPI1_MISO__ECSPI1_MISO = IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0),
+ MX6_PAD_ECSPI1_MOSI__ECSPI1_MOSI = IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0),
+ MX6_PAD_ECSPI1_SCLK__ECSPI1_SCLK = IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0),
+ MX6_PAD_ECSPI1_SS0__GPIO_4_11 = IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0),
};
#endif /* __ASM_ARCH_MX6_MX6SL_PINS_H__ */