diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2012-10-12 18:48:45 +0000 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2012-11-30 13:44:03 -0800 |
commit | 93c1735f41aa290c7f3ebc8545ccc8d9edd9f22f (patch) | |
tree | 7e8d12e0705a9692e6931253a77184fd8e349868 /arch | |
parent | b8715d8def240014da5614a4f940130ec06d9ebf (diff) | |
download | u-boot-imx-93c1735f41aa290c7f3ebc8545ccc8d9edd9f22f.zip u-boot-imx-93c1735f41aa290c7f3ebc8545ccc8d9edd9f22f.tar.gz u-boot-imx-93c1735f41aa290c7f3ebc8545ccc8d9edd9f22f.tar.bz2 |
x86: coreboot: Drop sysinfo.c
sysinfo.c only contains the lib_sysinfo data structure which
is used/filled by tables.c. This split was introduced by importing
code from libpayload originally, but to keep the code simple, add
the single line of actual code to tables.c
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/cpu/coreboot/Makefile | 1 | ||||
-rw-r--r-- | arch/x86/cpu/coreboot/sysinfo.c | 39 | ||||
-rw-r--r-- | arch/x86/cpu/coreboot/tables.c | 8 |
3 files changed, 8 insertions, 40 deletions
diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile index fbf5a00..2afd30c 100644 --- a/arch/x86/cpu/coreboot/Makefile +++ b/arch/x86/cpu/coreboot/Makefile @@ -37,7 +37,6 @@ COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o COBJS-$(CONFIG_SYS_COREBOOT) += tables.o COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o -COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o COBJS-$(CONFIG_PCI) += pci.o SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o diff --git a/arch/x86/cpu/coreboot/sysinfo.c b/arch/x86/cpu/coreboot/sysinfo.c deleted file mode 100644 index 9b3e660..0000000 --- a/arch/x86/cpu/coreboot/sysinfo.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the libpayload project. - * - * Copyright (C) 2008 Advanced Micro Devices, Inc. - * Copyright (C) 2009 coresystems GmbH - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include <asm/arch-coreboot/sysinfo.h> - -/* - * This needs to be in the .data section so that it's copied over during - * relocation. By default it's put in the .bss section which is simply filled - * with zeroes when transitioning from "ROM", which is really RAM, to other - * RAM. - */ -struct sysinfo_t lib_sysinfo __attribute__((section(".data"))); diff --git a/arch/x86/cpu/coreboot/tables.c b/arch/x86/cpu/coreboot/tables.c index 0e3451b..25ca50d 100644 --- a/arch/x86/cpu/coreboot/tables.c +++ b/arch/x86/cpu/coreboot/tables.c @@ -33,6 +33,14 @@ #include <asm/arch-coreboot/tables.h> /* + * This needs to be in the .data section so that it's copied over during + * relocation. By default it's put in the .bss section which is simply filled + * with zeroes when transitioning from "ROM", which is really RAM, to other + * RAM. + */ +struct sysinfo_t lib_sysinfo __attribute__((section(".data"))); + +/* * Some of this is x86 specific, and the rest of it is generic. Right now, * since we only support x86, we'll avoid trying to make lots of infrastructure * we don't need. If in the future, we want to use coreboot on some other |