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| author | Anson Huang <b20788@freescale.com> | 2014-03-24 12:54:00 +0800 |
|---|---|---|
| committer | Anson Huang <b20788@freescale.com> | 2014-03-24 13:18:02 +0800 |
| commit | b8e5e814de10c70cda1ecef8325cfe5bf4c45d33 (patch) | |
| tree | 1c7c8ef2eb3252b7aafba152828edcead53c54d0 /arch | |
| parent | d17f24d79df49f71545095855d9fb7c07bb87fe9 (diff) | |
| download | u-boot-imx-b8e5e814de10c70cda1ecef8325cfe5bf4c45d33.zip u-boot-imx-b8e5e814de10c70cda1ecef8325cfe5bf4c45d33.tar.gz u-boot-imx-b8e5e814de10c70cda1ecef8325cfe5bf4c45d33.tar.bz2 | |
ENGR00304841 ARM: imx: add debug monitor support
Debug monitor will print out last failed AXI access info when
system reboot is caused by AXI access failure, only works when
debug monitor is enabled.
Enable this module on i.MX6SX.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/imx-common/cpu.c | 12 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 17 |
2 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index a62d0d4..d677f47 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -142,6 +142,10 @@ const char *get_imx_type(u32 imxtype) int print_cpuinfo(void) { u32 cpurev; +#if defined(CONFIG_DBG_MONITOR) + struct dbg_monitor_regs *dbg = + (struct dbg_monitor_regs *)DEBUG_MONITOR_BASE_ADDR; +#endif cpurev = get_cpu_rev(); @@ -155,6 +159,14 @@ int print_cpuinfo(void) check_cpu_temperature(); #endif +#if defined(CONFIG_DBG_MONITOR) + if (readl(&dbg->snvs_addr)) + printf("DBG snvs regs addr 0x%x, data 0x%x, info 0x%x\n", + readl(&dbg->snvs_addr), + readl(&dbg->snvs_data), + readl(&dbg->snvs_info)); +#endif + printf("Reset cause: %s\n", get_reset_cause()); return 0; } diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index f6eec71..0f5a346 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -266,7 +266,11 @@ #define CSU_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x40000) #define IP2APB_PERFMON1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x44000) #define IP2APB_PERFMON2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x48000) +#ifdef CONFIG_MX6SX +#define DEBUG_MONITOR_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000) +#else #define IP2APB_PERFMON3_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000) +#endif #define IP2APB_TZASC1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x50000) #ifdef CONFIG_MX6SX #define SAI1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x54000) @@ -879,6 +883,19 @@ struct wdog_regs { u16 wmcr; /* Miscellaneous Control */ }; +struct dbg_monitor_regs { + u32 ctrl[4]; /* Control */ + u32 master_en[4]; /* Master enable */ + u32 irq[4]; /* IRQ */ + u32 trap_addr_low[4]; /* Trap address low */ + u32 trap_addr_high[4]; /* Trap address high */ + u32 trap_id[4]; /* Trap ID */ + u32 snvs_addr[4]; /* SNVS address */ + u32 snvs_data[4]; /* SNVS data */ + u32 snvs_info[4]; /* SNVS info */ + u32 version[4]; /* Version */ +}; + extern void check_cpu_temperature(void); /* If ROM fail back to USB recover mode, USBPH0_PWD will be clear to use USB |