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| author | Stefano Babic <sbabic@denx.de> | 2011-01-21 21:16:15 +0100 |
|---|---|---|
| committer | Albert Aribaud <albert.aribaud@free.fr> | 2011-02-02 00:54:43 +0100 |
| commit | db106ef7ebf671b9ae15cfacbccdd485437440b0 (patch) | |
| tree | 9c10e29967c56fb85c7859c6a056c647f3a73162 /arch | |
| parent | eae4988b45e17054f27d58b6fe0b42e080951382 (diff) | |
| download | u-boot-imx-db106ef7ebf671b9ae15cfacbccdd485437440b0.zip u-boot-imx-db106ef7ebf671b9ae15cfacbccdd485437440b0.tar.gz u-boot-imx-db106ef7ebf671b9ae15cfacbccdd485437440b0.tar.bz2 | |
MX5: Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss
The usage of bss values in drivers before initialisation of bss is forbidden.
In that special case some data in .rel.dyn gets corrupted.
This patch is the same as recently applied for arm926js architecture.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/mx5/timer.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx5/timer.c b/arch/arm/cpu/armv7/mx5/timer.c index 3044fcf..1972f64 100644 --- a/arch/arm/cpu/armv7/mx5/timer.c +++ b/arch/arm/cpu/armv7/mx5/timer.c @@ -44,8 +44,10 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR; #define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */ #define GPTCR_TEN (1) /* Timer enable */ -static ulong timestamp; -static ulong lastinc; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp (gd->tbl) +#define lastinc (gd->lastinc) int timer_init(void) { |