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authorFabio Estevam <fabio.estevam@freescale.com>2014-07-09 17:59:55 -0300
committerStefano Babic <sbabic@denx.de>2014-07-23 12:25:41 +0200
commitaeadf0655c5adaec718f37a05b05ea59f7492614 (patch)
tree28c5e28e7fdd87a4c91a695aec12f02b9e639700 /arch
parent0a11d6f29ce48c649e4358a24b5781d3171c5406 (diff)
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mx6: Adjust the GPR offset for mx6solox
On mx6solox there is an additional 0x4000 offset for the GPR registers. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-mx6/imx-regs.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 782d9c4..cc746b8 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -398,6 +398,9 @@ struct src {
struct iomuxc {
+#ifdef CONFIG_MX6SX
+ u8 reserved[0x4000];
+#endif
u32 gpr[14];
u32 omux[5];
/* mux and pad registers */