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authorJaehoon Chung <jh80.chung@samsung.com>2015-01-08 16:50:21 +0900
committerMinkyu Kang <mk7.kang@samsung.com>2015-02-13 17:15:14 +0900
commita276172cf32386c211c75638f6bf3c0d59ba03ba (patch)
treeb0fb67e0cce0a29b69fed0065d12a8b3e1a693fa /arch
parentbd2a4888b123713adec271d6c8040ca9f609aa2f (diff)
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arm: exynos: fix the div value for set_mmc_clk
The most exynos used the "Ratio + 1" as div value. And value at register is "Ratio". So if want to set exact value, it needs to subtract one. Value at register ("Ratio") = div - 1 Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/exynos/clock.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index b31c13b..3110bb0 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -1656,6 +1656,10 @@ unsigned long get_mmc_clk(int dev_index)
void set_mmc_clk(int dev_index, unsigned int div)
{
+ /* If want to set correct value, it needs to substract one from div.*/
+ if (div > 0)
+ div -= 1;
+
if (cpu_is_exynos5()) {
if (proid_is_exynos5420() || proid_is_exynos5800())
exynos5420_set_mmc_clk(dev_index, div);