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| author | Heiko Schocher <hs@denx.de> | 2014-10-31 08:30:58 +0100 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-11-17 08:47:16 -0500 |
| commit | 7dd5891061763b92e41a8e451a43be3d14ac9b4e (patch) | |
| tree | 71229e99afb62ca903cc61cf90d613f72470aae5 /arch | |
| parent | 341f548ee9f95150e64ed114361cfd5b0088f6ff (diff) | |
| download | u-boot-imx-7dd5891061763b92e41a8e451a43be3d14ac9b4e.zip u-boot-imx-7dd5891061763b92e41a8e451a43be3d14ac9b4e.tar.gz u-boot-imx-7dd5891061763b92e41a8e451a43be3d14ac9b4e.tar.bz2 | |
arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45
- compile mpddrc ram init code also for AT91SAM9M10G45
based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
in the cr configuration
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/at91-common/Makefile | 6 | ||||
| -rw-r--r-- | arch/arm/cpu/at91-common/mpddrc.c | 11 |
2 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm/cpu/at91-common/Makefile b/arch/arm/cpu/at91-common/Makefile index 5b97838..f62863a 100644 --- a/arch/arm/cpu/at91-common/Makefile +++ b/arch/arm/cpu/at91-common/Makefile @@ -9,4 +9,8 @@ # obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o -obj-$(CONFIG_SPL_BUILD) += mpddrc.o spl.o +ifneq ($(CONFIG_SPL_BUILD),) +obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o +obj-$(CONFIG_SAMA5D3) += mpddrc.o +obj-y += spl.o +endif diff --git a/arch/arm/cpu/at91-common/mpddrc.c b/arch/arm/cpu/at91-common/mpddrc.c index f78e4be..44798e6 100644 --- a/arch/arm/cpu/at91-common/mpddrc.c +++ b/arch/arm/cpu/at91-common/mpddrc.c @@ -17,6 +17,15 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address) writel(0, ram_address); } +static int ddr2_decodtype_is_seq(u32 cr) +{ +#if defined(CONFIG_SAMA5D3) + if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED) + return 0; +#endif + return 1; +} + int ddr2_init(const unsigned int ram_address, const struct atmel_mpddr *mpddr_value) { @@ -25,7 +34,7 @@ int ddr2_init(const unsigned int ram_address, /* Compute bank offset according to NC in configuration register */ ba_off = (mpddr_value->cr & ATMEL_MPDDRC_CR_NC_MASK) + 9; - if (!(mpddr_value->cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)) + if (ddr2_decodtype_is_seq(mpddr_value->cr)) ba_off += ((mpddr_value->cr & ATMEL_MPDDRC_CR_NR_MASK) >> 2) + 11; ba_off += (mpddr_value->md & ATMEL_MPDDRC_MD_DBW_MASK) ? 1 : 2; |