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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-02-20 17:18:42 +0900 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-02-20 12:00:20 -0500 |
| commit | 3241e3d08c8e43b72e1c83fd44a2eb3bbbe511f8 (patch) | |
| tree | 54290a194ddae1641466211739c310ddb49ca38f /arch | |
| parent | 39abd65c342a271d39fa580dc4c5cb7fce516ef3 (diff) | |
| download | u-boot-imx-3241e3d08c8e43b72e1c83fd44a2eb3bbbe511f8.zip u-boot-imx-3241e3d08c8e43b72e1c83fd44a2eb3bbbe511f8.tar.gz u-boot-imx-3241e3d08c8e43b72e1c83fd44a2eb3bbbe511f8.tar.bz2 | |
venice2: move device tree to fix build error
Commit 5ab502cb gathered all device tree sources
to arch/$(ARCH)/dts/.
So tegra124-venice2.dts also must go to arch/arm/dts directory
to build venice2 board.
(Commit 5ab502cb had been posted before venice2 board support
was merged. So an unvisible conflict happened.)
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/Makefile | 5 | ||||
| -rw-r--r-- | arch/arm/dts/tegra124-venice2.dts | 84 |
2 files changed, 86 insertions, 3 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2658911..e2fcca5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -2,7 +2,6 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ exynos5250-snow.dtb \ exynos5250-smdk5250.dtb \ exynos5420-smdk5420.dtb - dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ @@ -16,8 +15,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra30-beaver.dtb \ tegra30-cardhu.dtb \ tegra30-tec-ng.dtb \ - tegra114-dalmore.dtb - + tegra114-dalmore.dtb \ + tegra124-venice2.dtb dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \ zynq-zc706.dtb \ zynq-zed.dtb \ diff --git a/arch/arm/dts/tegra124-venice2.dts b/arch/arm/dts/tegra124-venice2.dts new file mode 100644 index 0000000..2f8d1dc --- /dev/null +++ b/arch/arm/dts/tegra124-venice2.dts @@ -0,0 +1,84 @@ +/dts-v1/; + +#include "tegra124.dtsi" + +/ { + model = "NVIDIA Venice2"; + compatible = "nvidia,venice2", "nvidia,tegra124"; + + aliases { + i2c0 = "/i2c@7000d000"; + i2c1 = "/i2c@7000c000"; + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + i2c4 = "/i2c@7000c700"; + i2c5 = "/i2c@7000d100"; + sdhci0 = "/sdhci@700b0600"; + sdhci1 = "/sdhci@700b0400"; + spi0 = "/spi@7000d400"; + spi1 = "/spi@7000da00"; + usb0 = "/usb@7d008000"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c500 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + }; + + i2c@7000d100 { + status = "okay"; + clock-frequency = <400000>; + }; + + spi@7000d400 { + status = "okay"; + spi-max-frequency = <25000000>; + }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + }; + + sdhci@700b0400 { + status = "okay"; + cd-gpios = <&gpio 170 0>; /* gpio PV2 */ + power-gpios = <&gpio 136 0>; /* gpio PR0 */ + bus-width = <4>; + }; + + sdhci@700b0600 { + status = "okay"; + bus-width = <8>; + }; + + usb@7d008000 { + status = "okay"; + nvidia,vbus-gpio = <&gpio 109 0>; /* gpio PN5, USB_VBUS_EN1 */ + }; +}; |