Merge branch 'master' of git://git.denx.de/u-boot-nios

5 files changed, 69 insertions, 6 deletions

diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c
index 86f94b7..39ae972 100644
--- a/arch/nios2/cpu/cpu.c
+++ b/arch/nios2/cpu/cpu.c
@@ -6,8 +6,7 @@
  */
 
 #include <common.h>
-#include <nios2.h>
-#include <nios2-io.h>
+#include <asm/nios2.h>
 #include <asm/cache.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/nios2/cpu/interrupts.c b/arch/nios2/cpu/interrupts.c
index c4bed22..9d7e193 100644
--- a/arch/nios2/cpu/interrupts.c
+++ b/arch/nios2/cpu/interrupts.c
@@ -9,8 +9,7 @@
  */
 
 
-#include <nios2.h>
-#include <nios2-io.h>
+#include <asm/nios2.h>
 #include <asm/types.h>
 #include <asm/io.h>
 #include <asm/ptrace.h>
@@ -21,6 +20,25 @@
 #include <status_led.h>
 #endif
 
+typedef volatile struct {
+	unsigned	status;			/* Timer status reg */
+	unsigned	control;		/* Timer control reg */
+	unsigned	periodl;		/* Timeout period low */
+	unsigned	periodh;		/* Timeout period high */
+	unsigned	snapl;			/* Snapshot low */
+	unsigned	snaph;			/* Snapshot high */
+} nios_timer_t;
+
+/* status register */
+#define NIOS_TIMER_TO		(1 << 0)	/* Timeout */
+#define NIOS_TIMER_RUN		(1 << 1)	/* Timer running */
+
+/* control register */
+#define NIOS_TIMER_ITO		(1 << 0)	/* Timeout int ena */
+#define NIOS_TIMER_CONT		(1 << 1)	/* Continuous mode */
+#define NIOS_TIMER_START	(1 << 2)	/* Start timer */
+#define NIOS_TIMER_STOP		(1 << 3)	/* Stop timer */
+
 #if defined(CONFIG_SYS_NIOS_TMRBASE) && !defined(CONFIG_SYS_NIOS_TMRIRQ)
 #error CONFIG_SYS_NIOS_TMRIRQ not defined (see documentation)
 #endif
diff --git a/arch/nios2/cpu/sysid.c b/arch/nios2/cpu/sysid.c
index 943bff8..50819b2 100644
--- a/arch/nios2/cpu/sysid.c
+++ b/arch/nios2/cpu/sysid.c
@@ -11,12 +11,16 @@
 
 #include <command.h>
 #include <asm/io.h>
-#include <nios2-io.h>
 #include <linux/time.h>
 
+typedef volatile struct {
+	unsigned	id;			/* The system build id */
+	unsigned	timestamp;		/* Timestamp */
+} nios_sysid_t;
+
 void display_sysid (void)
 {
-	struct nios_sysid_t *sysid = (struct nios_sysid_t *)CONFIG_SYS_NIOS_SYSID_BASE;
+	nios_sysid_t *sysid = (nios_sysid_t *)CONFIG_SYS_NIOS_SYSID_BASE;
 	struct tm t;
 	char asc[32];
 	time_t stamp;
diff --git a/arch/nios2/cpu/u-boot.lds b/arch/nios2/cpu/u-boot.lds
index be92e8e..6e174be 100644
--- a/arch/nios2/cpu/u-boot.lds
+++ b/arch/nios2/cpu/u-boot.lds
@@ -5,6 +5,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <config.h>
 
 OUTPUT_FORMAT("elf32-littlenios2")
 OUTPUT_ARCH(nios2)
@@ -12,6 +13,7 @@ ENTRY(_start)
 
 SECTIONS
 {
+	. = CONFIG_SYS_MONITOR_BASE;
 	.text :
 	{
 	  arch/nios2/cpu/start.o (.text)
diff --git a/arch/nios2/include/asm/nios2.h b/arch/nios2/include/asm/nios2.h
new file mode 100644
index 0000000..abe4df3
--- /dev/null
+++ b/arch/nios2/include/asm/nios2.h
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ASM_NIOS2_H__
+#define __ASM_NIOS2_H__
+
+/*------------------------------------------------------------------------
+ * Control registers -- use with wrctl() & rdctl()
+ *----------------------------------------------------------------------*/
+#define CTL_STATUS	0		/* Processor status reg		*/
+#define CTL_ESTATUS	1		/* Exception status reg		*/
+#define CTL_BSTATUS	2		/* Break status reg		*/
+#define CTL_IENABLE	3		/* Interrut enable reg		*/
+#define CTL_IPENDING	4		/* Interrut pending reg		*/
+
+/*------------------------------------------------------------------------
+ * Access to control regs
+ *----------------------------------------------------------------------*/
+
+#define rdctl(reg) __builtin_rdctl(reg)
+#define wrctl(reg, val) __builtin_wrctl(reg, val)
+
+/*------------------------------------------------------------------------
+ * Control reg bit masks
+ *----------------------------------------------------------------------*/
+#define STATUS_IE	(1<<0)		/* Interrupt enable		*/
+#define STATUS_U	(1<<1)		/* User-mode			*/
+
+/*------------------------------------------------------------------------
+ * Bit-31 Cache bypass -- only valid for data access. When data cache
+ * is not implemented, bit 31 is ignored for compatibility.
+ *----------------------------------------------------------------------*/
+#define CACHE_BYPASS(a) ((a) | 0x80000000)
+#define CACHE_NO_BYPASS(a) ((a) & ~0x80000000)
+
+#endif /* __ASM_NIOS2_H__ */