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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-08-13 00:29:11 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-08-26 07:54:07 -0700 |
| commit | a25bc78e2f8d9f91c6f7d97a3d4a6632bec3c400 (patch) | |
| tree | 53a0cc65a4c98ea0eaf5a686cc555644d2e69882 /arch/x86 | |
| parent | c17ca6b5cd7158b63a78c4944c732c49dce8454f (diff) | |
| download | u-boot-imx-a25bc78e2f8d9f91c6f7d97a3d4a6632bec3c400.zip u-boot-imx-a25bc78e2f8d9f91c6f7d97a3d4a6632bec3c400.tar.gz u-boot-imx-a25bc78e2f8d9f91c6f7d97a3d4a6632bec3c400.tar.bz2 | |
x86: coreboot: Allow >=4GiB memory bank size
Some platforms may have >=4GiB memory, so we need make U-Boot report
such configuration correctly when booting as the coreboot payload.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/cpu/coreboot/sdram.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index ae5c893..32f595d 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -94,10 +94,10 @@ int dram_init(void) struct memrange *memrange = &lib_sysinfo.memrange[i]; unsigned long long end = memrange->base + memrange->size; - if (memrange->type == CB_MEM_RAM && end > ram_size && - memrange->base < (1ULL << 32)) - ram_size = end; + if (memrange->type == CB_MEM_RAM && end > ram_size) + ram_size += memrange->size; } + gd->ram_size = ram_size; if (ram_size == 0) return -1; @@ -113,8 +113,7 @@ void dram_init_banksize(void) for (i = 0, j = 0; i < lib_sysinfo.n_memranges; i++) { struct memrange *memrange = &lib_sysinfo.memrange[i]; - if (memrange->type == CB_MEM_RAM && - memrange->base < (1ULL << 32)) { + if (memrange->type == CB_MEM_RAM) { gd->bd->bi_dram[j].start = memrange->base; gd->bd->bi_dram[j].size = memrange->size; j++; |