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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-07-30 03:49:15 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-08-05 08:42:39 -0600 |
| commit | 3e79a4ab2624371759c8e3e88d24116418389a10 (patch) | |
| tree | d5d592cf3e09b553faaa297f3770f142b88ac9d4 /arch/x86 | |
| parent | 456ee909d63a35daa51b70231c4abffa4709e9f3 (diff) | |
| download | u-boot-imx-3e79a4ab2624371759c8e3e88d24116418389a10.zip u-boot-imx-3e79a4ab2624371759c8e3e88d24116418389a10.tar.gz u-boot-imx-3e79a4ab2624371759c8e3e88d24116418389a10.tar.bz2 | |
x86: baytrail: Update UPD setting for FSP Gold4 release
BayTrail FSP Gold4 release adds one UPD parameter to control IGD
enable/disable.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h index 82862f6..eb0d506 100644 --- a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h +++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h @@ -75,7 +75,8 @@ struct __packed upd_region { uint8_t emmc45_ddr50_enabled; /* Offset 0x0051 */ uint8_t emmc45_hs200_enabled; /* Offset 0x0052 */ uint8_t emmc45_retune_timer_value; /* Offset 0x0053 */ - uint8_t unused_upd_space1[156]; /* Offset 0x0054 */ + uint8_t enable_igd; /* Offset 0x0054 */ + uint8_t unused_upd_space1[155]; /* Offset 0x0055 */ struct memory_down_data memory_params; /* Offset 0x00f0 */ uint16_t terminator; /* Offset 0x0100 */ }; |