summaryrefslogtreecommitdiff
path: root/arch/x86
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2014-10-10 07:30:13 -0600
committerSimon Glass <sjg@chromium.org>2014-10-22 21:50:32 -0600
commit6ddc4fd82283056a65d61ef38398ffbd06fd3c7b (patch)
treebae66741c5971caed4be6a5052de32aa1b43baec /arch/x86
parent2d41046531fb2421f2dd3f43a16f3d2f6484dad2 (diff)
downloadu-boot-imx-6ddc4fd82283056a65d61ef38398ffbd06fd3c7b.zip
u-boot-imx-6ddc4fd82283056a65d61ef38398ffbd06fd3c7b.tar.gz
u-boot-imx-6ddc4fd82283056a65d61ef38398ffbd06fd3c7b.tar.bz2
x86: Add device tree information for Chrome OS EC
Add the required node describing how to find the EC on link. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/dts/link.dts18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
index 4a37dac..67ce52a 100644
--- a/arch/x86/dts/link.dts
+++ b/arch/x86/dts/link.dts
@@ -32,4 +32,22 @@
memory-map = <0xff800000 0x00800000>;
};
};
+
+ lpc {
+ compatible = "intel,lpc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cros-ec@200 {
+ compatible = "google,cros-ec";
+ reg = <0x204 1 0x200 1 0x880 0x80>;
+
+ /* This describes the flash memory within the EC */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ flash@8000000 {
+ reg = <0x08000000 0x20000>;
+ erase-value = <0xff>;
+ };
+ };
+ };
};