diff options
author | Bin Meng <bmeng.cn@gmail.com> | 2014-11-20 16:11:16 +0800 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2014-11-25 06:34:02 -0700 |
commit | 1dae2e0eb660553fd18870b53e4c43bd56414e3b (patch) | |
tree | a4680bc0f20291f016a711730b801a052ec2941a /arch/x86 | |
parent | a549f7497b4d719d37e4a20378c81c1b29bf0404 (diff) | |
download | u-boot-imx-1dae2e0eb660553fd18870b53e4c43bd56414e3b.zip u-boot-imx-1dae2e0eb660553fd18870b53e4c43bd56414e3b.tar.gz u-boot-imx-1dae2e0eb660553fd18870b53e4c43bd56414e3b.tar.bz2 |
x86: Refactor interrupt_init()
Rename interrupt_init() in arch/x86/lib/pcat_interrupts.c to
i8259_init() and create a new interrupt_init() in
arch/x86/cpu/interrupt.c to call i8259_init() followed by a
call to cpu_init_interrupts().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/cpu/interrupts.c | 26 | ||||
-rw-r--r-- | arch/x86/include/asm/i8259.h | 2 | ||||
-rw-r--r-- | arch/x86/lib/pcat_interrupts.c | 9 |
3 files changed, 23 insertions, 14 deletions
diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c index 51e2c59..ea03724 100644 --- a/arch/x86/cpu/interrupts.c +++ b/arch/x86/cpu/interrupts.c @@ -20,6 +20,7 @@ #include <linux/compiler.h> #include <asm/msr.h> #include <asm/u-boot-x86.h> +#include <asm/i8259.h> DECLARE_GLOBAL_DATA_PTR; @@ -128,9 +129,6 @@ int cpu_init_interrupts(void) int irq_entry_size = irq_1 - irq_0; void *irq_entry = (void *)irq_0; - /* Just in case... */ - disable_interrupts(); - /* Setup the IDT */ for (i = 0; i < 256; i++) { idt[i].access = 0x8e; @@ -146,9 +144,6 @@ int cpu_init_interrupts(void) load_idt(&idt_ptr); - /* It is now safe to enable interrupts */ - enable_interrupts(); - return 0; } @@ -172,6 +167,25 @@ int disable_interrupts(void) return flags & X86_EFLAGS_IF; } +int interrupt_init(void) +{ + /* Just in case... */ + disable_interrupts(); + +#ifdef CONFIG_SYS_PCAT_INTERRUPTS + /* Initialize the master/slave i8259 pic */ + i8259_init(); +#endif + + /* Initialize core interrupt and exception functionality of CPU */ + cpu_init_interrupts(); + + /* It is now safe to enable interrupts */ + enable_interrupts(); + + return 0; +} + /* IRQ Low-Level Service Routine */ void irq_llsr(struct irq_regs *regs) { diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h index 73113f9..bc4033b 100644 --- a/arch/x86/include/asm/i8259.h +++ b/arch/x86/include/asm/i8259.h @@ -69,4 +69,6 @@ #define ICW4_AEOI 0x02 /* Automatic EOI Mode */ #define ICW4_PM 0x01 /* Microprocessor Mode */ +int i8259_init(void); + #endif diff --git a/arch/x86/lib/pcat_interrupts.c b/arch/x86/lib/pcat_interrupts.c index f388db2..a9af87e 100644 --- a/arch/x86/lib/pcat_interrupts.c +++ b/arch/x86/lib/pcat_interrupts.c @@ -24,12 +24,10 @@ #error "CONFIG_SYS_NUM_IRQS must equal 16 if CONFIG_SYS_NUM_IRQS is defined" #endif -int interrupt_init(void) +int i8259_init(void) { u8 i; - disable_interrupts(); - /* Mask all interrupts */ outb(0xff, MASTER_PIC + IMR); outb(0xff, SLAVE_PIC + IMR); @@ -65,11 +63,6 @@ int interrupt_init(void) /* Interrupt 9 should be level triggered (SCI). The OS might do this */ configure_irq_trigger(9, true); - /* Initialize core interrupt and exception functionality of CPU */ - cpu_init_interrupts(); - - enable_interrupts(); - return 0; } |