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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-01-22 11:29:41 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-01-23 17:24:55 -0700 |
| commit | 3b621ccabdccb34891bb58865a9654a09c2b7279 (patch) | |
| tree | 8c9321d4657a4154867bd77d92d4d5dad851dbc3 /arch/x86/lib | |
| parent | 49491669065c1c718d8dc0b0ebc151b3d010c17b (diff) | |
| download | u-boot-imx-3b621ccabdccb34891bb58865a9654a09c2b7279.zip u-boot-imx-3b621ccabdccb34891bb58865a9654a09c2b7279.tar.gz u-boot-imx-3b621ccabdccb34891bb58865a9654a09c2b7279.tar.bz2 | |
x86: Test mtrr support flag before accessing mtrr msr
On some x86 processors (like Intel Quark) the MTRR registers are not
supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
Accessing the MTRR registers on such processors will cause #GP so we
must test the support flag before accessing MTRR MSRs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/lib')
| -rw-r--r-- | arch/x86/lib/init_helpers.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index fc211d9..5097ca2 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -7,6 +7,7 @@ #include <common.h> #include <fdtdec.h> #include <spi.h> +#include <asm/errno.h> #include <asm/mtrr.h> #include <asm/sections.h> @@ -71,7 +72,8 @@ int init_cache_f_r(void) int ret; ret = mtrr_commit(false); - if (ret) + /* If MTRR MSR is not implemented by the processor, just ignore it */ + if (ret && ret != -ENOSYS) return ret; #endif /* Initialise the CPU cache(s) */ |