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| author | Simon Glass <sjg@chromium.org> | 2014-11-12 22:42:14 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-21 07:34:12 +0100 |
| commit | 6fb3b72e8745073465b4a5875b7750cc43cbd1af (patch) | |
| tree | e4a798cc0d1a9741752d0b4adde393d1d4d1e936 /arch/x86/include | |
| parent | 6e5b12b6144acd83dcfb4a79ea0beff787f3f545 (diff) | |
| download | u-boot-imx-6fb3b72e8745073465b4a5875b7750cc43cbd1af.zip u-boot-imx-6fb3b72e8745073465b4a5875b7750cc43cbd1af.tar.gz u-boot-imx-6fb3b72e8745073465b4a5875b7750cc43cbd1af.tar.bz2 | |
x86: pci: Allow configuration before relocation
Add simple PCI access routines for x86 which permit use before relocation.
The normal PCI stack is still used, but for pre-relocation use there can
only ever be a single hose. After relocation, fall back to the normal
access, although even then on x86 machines there is normally only a single
PCI bus.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include')
| -rw-r--r-- | arch/x86/include/asm/pci.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 6e70a99..98817aa 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -33,4 +33,17 @@ void board_pci_setup_hose(struct pci_controller *hose); * later use, but will become invalid one DRAM is available. */ int pci_early_init_hose(struct pci_controller **hosep); + +/* + * Simple PCI access routines - these work from either the early PCI hose + * or the 'real' one, created after U-Boot has memory available + */ +unsigned int pci_read_config8(pci_dev_t dev, unsigned where); +unsigned int pci_read_config16(pci_dev_t dev, unsigned where); +unsigned int pci_read_config32(pci_dev_t dev, unsigned where); + +void pci_write_config8(pci_dev_t dev, unsigned where, unsigned value); +void pci_write_config16(pci_dev_t dev, unsigned where, unsigned value); +void pci_write_config32(pci_dev_t dev, unsigned where, unsigned value); + #endif |