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authorSimon Glass <sjg@chromium.org>2014-11-24 21:18:16 -0700
committerSimon Glass <sjg@chromium.org>2014-11-25 06:34:14 -0700
commitbb80be391693a868c2114d1a9505c45dce7a3607 (patch)
tree48fa7818ae5d90e1925bdf900f36f34a252ead68 /arch/x86/include
parent0c9075e9ad21caa43c524288d7def9e8b081fa11 (diff)
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x86: Add init for model 206AX CPU
Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/arch-ivybridge/bd82x6x.h3
-rw-r--r--arch/x86/include/asm/msr-index.h2
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
index 6454dd9..96d51c2 100644
--- a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
+++ b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
@@ -15,4 +15,7 @@ void bd82x6x_usb_xhci_init(pci_dev_t dev);
int bd82x6x_init_pci_devices(void);
int bd82x6x_init(void);
+struct x86_cpu_priv;
+int model_206ax_init(struct x86_cpu_priv *cpu);
+
#endif
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 6027d59..2cbb270 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -326,6 +326,8 @@
#define MSR_AMD_PERF_STATUS 0xc0010063
#define MSR_AMD_PERF_CTL 0xc0010062
+#define MSR_PMG_CST_CONFIG_CTL 0x000000e2
+#define MSR_PMG_IO_CAPTURE_ADR 0x000000e4
#define MSR_IA32_MPERF 0x000000e7
#define MSR_IA32_APERF 0x000000e8