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authorTom Rini <trini@ti.com>2015-01-13 13:39:25 -0500
committerTom Rini <trini@ti.com>2015-01-13 13:39:25 -0500
commit5f88ed5cde04612e5b4520327b82d81a3f5493a0 (patch)
treeae465a7b43e4a01fa4ec774f0199e86743c8d46a /arch/x86/include
parent95f5c8f2269fc144fba5a21c0e9edf5311007484 (diff)
parent657e384af630463e3c8c4ffbacd16c5e46aeb0e0 (diff)
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Merge git://git.denx.de/u-boot-x86
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/arch-ivybridge/microcode.h6
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h68
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h5
-rw-r--r--arch/x86/include/asm/global_data.h16
-rw-r--r--arch/x86/include/asm/mtrr.h163
-rw-r--r--arch/x86/include/asm/pci.h2
6 files changed, 112 insertions, 148 deletions
diff --git a/arch/x86/include/asm/arch-ivybridge/microcode.h b/arch/x86/include/asm/arch-ivybridge/microcode.h
index bc9b87c..b868283 100644
--- a/arch/x86/include/asm/arch-ivybridge/microcode.h
+++ b/arch/x86/include/asm/arch-ivybridge/microcode.h
@@ -7,6 +7,11 @@
#ifndef __ASM_ARCH_MICROCODE_H
#define __ASM_ARCH_MICROCODE_H
+/* Length of the public header on Intel microcode blobs */
+#define UCODE_HEADER_LEN 0x30
+
+#ifndef __ASSEMBLY__
+
/**
* microcode_update_intel() - Apply microcode updates
*
@@ -16,5 +21,6 @@
* not updates were found, -EINVAL if an update was invalid
*/
int microcode_update_intel(void);
+#endif /* __ASSEMBLY__ */
#endif
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h
index 380b64e..6cca7f5 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h
@@ -182,58 +182,19 @@ struct hob_guid {
/* GUID specific data goes here */
};
-/* Union of all the possible HOB Types */
-union hob_pointers {
- struct hob_header *hdr;
- struct hob_mem_alloc *mem_alloc;
- struct hob_res_desc *res_desc;
- struct hob_guid *guid;
- u8 *raw;
-};
-
-/**
- * get_hob_type() - return the type of a HOB
- *
- * This macro returns the type field from the HOB header for the
- * HOB specified by hob.
- *
- * @hob: A pointer to a HOB.
- *
- * @return: HOB type.
- */
-static inline u16 get_hob_type(union hob_pointers hob)
-{
- return hob.hdr->type;
-}
-
-/**
- * get_hob_length() - return the length, in bytes, of a HOB
- *
- * This macro returns the len field from the HOB header for the
- * HOB specified by hob.
- *
- * @hob: A pointer to a HOB.
- *
- * @return: HOB length.
- */
-static inline u16 get_hob_length(union hob_pointers hob)
-{
- return hob.hdr->len;
-}
-
/**
* get_next_hob() - return a pointer to the next HOB in the HOB list
*
* This macro returns a pointer to HOB that follows the HOB specified by hob
* in the HOB List.
*
- * @hob: A pointer to a HOB.
+ * @hdr: A pointer to a HOB.
*
* @return: A pointer to the next HOB in the HOB list.
*/
-static inline void *get_next_hob(union hob_pointers hob)
+static inline const struct hob_header *get_next_hob(const struct hob_header *hdr)
{
- return (void *)(*(u8 **)&(hob) + get_hob_length(hob));
+ return (const struct hob_header *)((u32)hdr + hdr->len);
}
/**
@@ -243,14 +204,14 @@ static inline void *get_next_hob(union hob_pointers hob)
* HOB list. If hob is last HOB in the HOB list, then true is returned.
* Otherwise, false is returned.
*
- * @hob: A pointer to a HOB.
+ * @hdr: A pointer to a HOB.
*
- * @retval true: The HOB specified by hob is the last HOB in the HOB list.
- * @retval false: The HOB specified by hob is not the last HOB in the HOB list.
+ * @retval true: The HOB specified by hdr is the last HOB in the HOB list.
+ * @retval false: The HOB specified by hdr is not the last HOB in the HOB list.
*/
-static inline bool end_of_hob(union hob_pointers hob)
+static inline bool end_of_hob(const struct hob_header *hdr)
{
- return get_hob_type(hob) == HOB_TYPE_EOH;
+ return hdr->type == HOB_TYPE_EOH;
}
/**
@@ -260,13 +221,13 @@ static inline bool end_of_hob(union hob_pointers hob)
* This macro returns a pointer to the data buffer in a HOB specified by hob.
* hob is assumed to be a HOB of type HOB_TYPE_GUID_EXT.
*
- * @hob: A pointer to a HOB.
+ * @hdr: A pointer to a HOB.
*
* @return: A pointer to the data buffer in a HOB.
*/
-static inline void *get_guid_hob_data(u8 *hob)
+static inline void *get_guid_hob_data(const struct hob_header *hdr)
{
- return (void *)(hob + sizeof(struct hob_guid));
+ return (void *)((u32)hdr + sizeof(struct hob_guid));
}
/**
@@ -276,14 +237,13 @@ static inline void *get_guid_hob_data(u8 *hob)
* This macro returns the size, in bytes, of the data buffer in a HOB
* specified by hob. hob is assumed to be a HOB of type HOB_TYPE_GUID_EXT.
*
- * @hob: A pointer to a HOB.
+ * @hdr: A pointer to a HOB.
*
* @return: The size of the data buffer.
*/
-static inline u16 get_guid_hob_data_size(u8 *hob)
+static inline u16 get_guid_hob_data_size(const struct hob_header *hdr)
{
- union hob_pointers hob_p = *(union hob_pointers *)hob;
- return get_hob_length(hob_p) - sizeof(struct hob_guid);
+ return hdr->len - sizeof(struct hob_guid);
}
/* FSP specific GUID HOB definitions */
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h
index 3ae1b66..ebdbd03 100644
--- a/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h
@@ -145,7 +145,7 @@ u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len);
*
* @retval: A HOB object with matching type; Otherwise NULL.
*/
-void *fsp_get_next_hob(u16 type, const void *hob_list);
+const struct hob_header *fsp_get_next_hob(uint type, const void *hob_list);
/**
* Returns the next instance of the matched GUID HOB from the starting HOB.
@@ -155,7 +155,8 @@ void *fsp_get_next_hob(u16 type, const void *hob_list);
*
* @retval: A HOB object with matching GUID; Otherwise NULL.
*/
-void *fsp_get_next_guid_hob(const struct efi_guid *guid, const void *hob_list);
+const struct hob_header *fsp_get_next_guid_hob(const struct efi_guid *guid,
+ const void *hob_list);
/**
* This function retrieves a GUID HOB data buffer and size.
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 03d491a..24e3052 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -29,6 +29,19 @@ struct memory_info {
struct memory_area area[CONFIG_NR_DRAM_BANKS];
};
+#define MAX_MTRR_REQUESTS 8
+
+/**
+ * A request for a memory region to be set up in a particular way. These
+ * requests are processed before board_init_r() is called. They are generally
+ * optional and can be ignored with some performance impact.
+ */
+struct mtrr_request {
+ int type; /* MTRR_TYPE_... */
+ uint64_t start;
+ uint64_t size;
+};
+
/* Architecture-specific global data */
struct arch_global_data {
struct global_data *gd_addr; /* Location of Global Data */
@@ -43,13 +56,14 @@ struct arch_global_data {
uint32_t tsc_mhz; /* TSC frequency in MHz */
void *new_fdt; /* Relocated FDT */
uint32_t bist; /* Built-in self test value */
- struct pci_controller *hose; /* PCI hose for early use */
enum pei_boot_mode_t pei_boot_mode;
const struct pch_gpio_map *gpio_map; /* board GPIO map */
struct memory_info meminfo; /* Memory information */
#ifdef CONFIG_HAVE_FSP
void *hob_list; /* FSP HOB list */
#endif
+ struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS];
+ int mtrr_req_count;
};
#endif
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 5f05a48..3c11740 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -9,99 +9,86 @@
#ifndef _ASM_MTRR_H
#define _ASM_MTRR_H
-/* These are the region types */
-#define MTRR_TYPE_UNCACHEABLE 0
-#define MTRR_TYPE_WRCOMB 1
-/*#define MTRR_TYPE_ 2*/
-/*#define MTRR_TYPE_ 3*/
-#define MTRR_TYPE_WRTHROUGH 4
-#define MTRR_TYPE_WRPROT 5
-#define MTRR_TYPE_WRBACK 6
-#define MTRR_NUM_TYPES 7
-
-#define MTRRcap_MSR 0x0fe
-#define MTRRdefType_MSR 0x2ff
-
-#define MTRRdefTypeEn (1 << 11)
-#define MTRRdefTypeFixEn (1 << 10)
-
-#define SMRRphysBase_MSR 0x1f2
-#define SMRRphysMask_MSR 0x1f3
-
-#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
-#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
-
-#define MTRRphysMaskValid (1 << 11)
-
-#define NUM_FIXED_RANGES 88
-#define RANGES_PER_FIXED_MTRR 8
-#define MTRRfix64K_00000_MSR 0x250
-#define MTRRfix16K_80000_MSR 0x258
-#define MTRRfix16K_A0000_MSR 0x259
-#define MTRRfix4K_C0000_MSR 0x268
-#define MTRRfix4K_C8000_MSR 0x269
-#define MTRRfix4K_D0000_MSR 0x26a
-#define MTRRfix4K_D8000_MSR 0x26b
-#define MTRRfix4K_E0000_MSR 0x26c
-#define MTRRfix4K_E8000_MSR 0x26d
-#define MTRRfix4K_F0000_MSR 0x26e
-#define MTRRfix4K_F8000_MSR 0x26f
+/* MTRR region types */
+#define MTRR_TYPE_UNCACHEABLE 0
+#define MTRR_TYPE_WRCOMB 1
+#define MTRR_TYPE_WRTHROUGH 4
+#define MTRR_TYPE_WRPROT 5
+#define MTRR_TYPE_WRBACK 6
+
+#define MTRR_TYPE_COUNT 7
+
+#define MTRR_CAP_MSR 0x0fe
+#define MTRR_DEF_TYPE_MSR 0x2ff
+
+#define MTRR_DEF_TYPE_EN (1 << 11)
+#define MTRR_DEF_TYPE_FIX_EN (1 << 10)
+
+#define MTRR_PHYS_BASE_MSR(reg) (0x200 + 2 * (reg))
+#define MTRR_PHYS_MASK_MSR(reg) (0x200 + 2 * (reg) + 1)
+
+#define MTRR_PHYS_MASK_VALID (1 << 11)
+
+#define MTRR_BASE_TYPE_MASK 0x7
+
+/* Number of MTRRs supported */
+#define MTRR_COUNT 8
#if !defined(__ASSEMBLER__)
-/*
- * The MTRR code has some side effects that the callers should be aware for.
- * 1. The call sequence matters. x86_setup_mtrrs() calls
- * x86_setup_fixed_mtrrs_no_enable() then enable_fixed_mtrrs() (equivalent
- * of x86_setup_fixed_mtrrs()) then x86_setup_var_mtrrs(). If the callers
- * want to call the components of x86_setup_mtrrs() because of other
- * rquirements the ordering should still preserved.
- * 2. enable_fixed_mtrr() will enable both variable and fixed MTRRs because
- * of the nature of the global MTRR enable flag. Therefore, all direct
- * or indirect callers of enable_fixed_mtrr() should ensure that the
- * variable MTRR MSRs do not contain bad ranges.
- * 3. If CONFIG_CACHE_ROM is selected an MTRR is allocated for enabling
- * the caching of the ROM. However, it is set to uncacheable (UC). It
- * is the responsiblity of the caller to enable it by calling
- * x86_mtrr_enable_rom_caching().
+/**
+ * Information about the previous MTRR state, set up by mtrr_open()
+ *
+ * @deftype: Previous value of MTRR_DEF_TYPE_MSR
+ * @enable_cache: true if cache was enabled
*/
-void x86_setup_mtrrs(void);
-/*
- * x86_setup_var_mtrrs() parameters:
- * address_bits - number of physical address bits supported by cpu
- * above4gb - 2 means dynamically detect number of variable MTRRs available.
- * non-zero means handle memory ranges above 4GiB.
- * 0 means ignore memory ranges above 4GiB
+struct mtrr_state {
+ uint64_t deftype;
+ bool enable_cache;
+};
+
+/**
+ * mtrr_open() - Prepare to adjust MTRRs
+ *
+ * Use mtrr_open() passing in a structure - this function will init it. Then
+ * when done, pass the same structure to mtrr_close() to re-enable MTRRs and
+ * possibly the cache.
+ *
+ * @state: Empty structure to pass in to hold settings
*/
-void x86_setup_var_mtrrs(unsigned int address_bits, unsigned int above4gb);
-void enable_fixed_mtrr(void);
-void x86_setup_fixed_mtrrs(void);
-/* Set up fixed MTRRs but do not enable them. */
-void x86_setup_fixed_mtrrs_no_enable(void);
-int x86_mtrr_check(void);
-/* ROM caching can be used after variable MTRRs are set up. Beware that
- * enabling CONFIG_CACHE_ROM will eat through quite a few MTRRs based on
- * one's IO hole size and WRCOMB resources. Be sure to check the console
- * log when enabling CONFIG_CACHE_ROM or adding WRCOMB resources. Beware that
- * on CPUs with core-scoped MTRR registers such as hyperthreaded CPUs the
- * rom caching will be disabled if all threads run the MTRR code. Therefore,
- * one needs to call x86_mtrr_enable_rom_caching() after all threads of the
- * same core have run the MTRR code. */
-#if CONFIG_CACHE_ROM
-void x86_mtrr_enable_rom_caching(void);
-void x86_mtrr_disable_rom_caching(void);
-/* Return the variable range MTRR index of the ROM cache. */
-long x86_mtrr_rom_cache_var_index(void);
-#else
-static inline void x86_mtrr_enable_rom_caching(void) {}
-static inline void x86_mtrr_disable_rom_caching(void) {}
-static inline long x86_mtrr_rom_cache_var_index(void) { return -1; }
-#endif /* CONFIG_CACHE_ROM */
+void mtrr_open(struct mtrr_state *state);
-#endif
+/**
+ * mtrr_open() - Clean up after adjusting MTRRs, and enable them
+ *
+ * This uses the structure containing information returned from mtrr_open().
+ *
+ * @state: Structure from mtrr_open()
+ */
+/* */
+void mtrr_close(struct mtrr_state *state);
+
+/**
+ * mtrr_add_request() - Add a new MTRR request
+ *
+ * This adds a request for a memory region to be set up in a particular way.
+ *
+ * @type: Requested type (MTRR_TYPE_)
+ * @start: Start address
+ * @size: Size
+ */
+int mtrr_add_request(int type, uint64_t start, uint64_t size);
+
+/**
+ * mtrr_commit() - set up the MTRR registers based on current requests
+ *
+ * This sets up MTRRs for the available DRAM and the requests received so far.
+ * It must be called with caches disabled.
+ *
+ * @do_caches: true if caches are currently on
+ */
+int mtrr_commit(bool do_caches);
-#if !defined(CONFIG_RAMTOP)
-# error "CONFIG_RAMTOP not defined"
#endif
#if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE - 1)) != 0)
@@ -114,8 +101,4 @@ static inline long x86_mtrr_rom_cache_var_index(void) { return -1; }
#define CACHE_ROM_BASE (((1 << 20) - (CONFIG_CACHE_ROM_SIZE >> 12)) << 12)
-#if (CONFIG_RAMTOP & (CONFIG_RAMTOP - 1)) != 0
-# error "CONFIG_RAMTOP must be a power of 2"
-#endif
-
#endif
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index ac1a808..c30dd4c 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -29,7 +29,7 @@ void board_pci_setup_hose(struct pci_controller *hose);
* pci_early_init_hose() - Set up PCI host before relocation
*
* This allocates memory for, sets up and returns the PCI hose. It can be
- * called before relocation. The hose will be stored in gd->arch.hose for
+ * called before relocation. The hose will be stored in gd->hose for
* later use, but will become invalid one DRAM is available.
*/
int pci_early_init_hose(struct pci_controller **hosep);