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authorGraeme Russ <graeme.russ@gmail.com>2011-11-08 02:33:18 +0000
committerGraeme Russ <graeme.russ@gmail.com>2011-11-29 21:07:42 +1100
commit311b1a2b38b5317fdff76a5dad9d16fee3f52c79 (patch)
tree16769d92346b0c1a931f3043db08f21cf739b5db /arch/x86/include/asm
parentfacc9e7bf42e3578d7e7cecf1727f31badeee6bd (diff)
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sc520: Create arch asm-offsets
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r--arch/x86/include/asm/arch-sc520/sc520.h26
-rw-r--r--arch/x86/include/asm/global_data.h19
2 files changed, 0 insertions, 45 deletions
diff --git a/arch/x86/include/asm/arch-sc520/sc520.h b/arch/x86/include/asm/arch-sc520/sc520.h
index 5ac9bb8..9dc29d3 100644
--- a/arch/x86/include/asm/arch-sc520/sc520.h
+++ b/arch/x86/include/asm/arch-sc520/sc520.h
@@ -259,32 +259,6 @@ extern sc520_mmcr_t *sc520_mmcr;
/* Memory Mapped Control Registers (MMCR) Base Address */
#define SC520_MMCR_BASE 0xfffef000
-/* MMCR Addresses (required for assembler code) */
-#define SC520_DRCCTL (SC520_MMCR_BASE + 0x010)
-#define SC520_DRCTMCTL (SC520_MMCR_BASE + 0x012)
-#define SC520_DRCCFG (SC520_MMCR_BASE + 0x014)
-#define SC520_DRCBENDADR (SC520_MMCR_BASE + 0x018)
-#define SC520_ECCCTL (SC520_MMCR_BASE + 0x020)
-#define SC520_DBCTL (SC520_MMCR_BASE + 0x040)
-#define SC520_ECCINT (SC520_MMCR_BASE + 0xd18)
-
-#define SC520_PAR0 (SC520_MMCR_BASE + 0x088)
-#define SC520_PAR1 (SC520_PAR0 + (0x04 * 1))
-#define SC520_PAR2 (SC520_PAR0 + (0x04 * 2))
-#define SC520_PAR3 (SC520_PAR0 + (0x04 * 3))
-#define SC520_PAR4 (SC520_PAR0 + (0x04 * 4))
-#define SC520_PAR5 (SC520_PAR0 + (0x04 * 5))
-#define SC520_PAR6 (SC520_PAR0 + (0x04 * 6))
-#define SC520_PAR7 (SC520_PAR0 + (0x04 * 7))
-#define SC520_PAR8 (SC520_PAR0 + (0x04 * 8))
-#define SC520_PAR9 (SC520_PAR0 + (0x04 * 9))
-#define SC520_PAR10 (SC520_PAR0 + (0x04 * 10))
-#define SC520_PAR11 (SC520_PAR0 + (0x04 * 11))
-#define SC520_PAR12 (SC520_PAR0 + (0x04 * 12))
-#define SC520_PAR13 (SC520_PAR0 + (0x04 * 13))
-#define SC520_PAR14 (SC520_PAR0 + (0x04 * 14))
-#define SC520_PAR15 (SC520_PAR0 + (0x04 * 15))
-
/*
* PARs for maximum allowable 256MB of SDRAM @ 0x00000000
* Two PARs are required due to maximum PAR size of 128MB
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index c736549..05a2139 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -61,25 +61,6 @@ extern gd_t *gd;
#endif
-/* Word Offsets into Global Data - MUST match struct gd_t */
-#define GD_BD 0
-#define GD_FLAGS 1
-#define GD_BAUDRATE 2
-#define GD_HAVE_CONSOLE 3
-#define GD_RELOC_OFF 4
-#define GD_LOAD_OFF 5
-#define GD_ENV_ADDR 6
-#define GD_ENV_VALID 7
-#define GD_CPU_CLK 8
-#define GD_BUS_CLK 9
-#define GD_RELOC_ADDR 10
-#define GD_START_ADDR_SP 11
-#define GD_RAM_SIZE 12
-#define GD_RESET_STATUS 13
-#define GD_JT 14
-
-#define GD_SIZE 15
-
/*
* Global Data Flags
*/